# US 12,119,292 B2 · Semiconductor device and method of manufacture

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- Number: US 12,119,292 B2
- Document ID: US12119292B2
- Status: Granted
- Kind: B2
- Application number: 18/446,006
- Filed: 2023-08-08
- Published: 2023-11-30
- Granted: 2024-10-15
- Earliest claimed: 2019-07-18
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Jiun Yi Wu; Chen-Hua Yu
- Web page: https://patentgrep.com/patent/US12119292B2

## CPC

- H10W 70/685: comprising multiple insulating layers
- H10D 1/68: Capacitors having no potential barriers
- H10P 72/74: {using temporarily an auxiliary support}
- H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04)
- H10W 70/095: {of vias therein}
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 70/635: {Through-vias}
- H10W 70/695: Organic materials
- H10W 90/00: Package configurations
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10P 72/7424: {used as a support during the manufacture of self-supporting substrates}
- H10P 72/743: {used as a support during manufacture of interconnect decals or build up layers}
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 72/01271: {Cleaning, e.g. oxide removal or de-smearing}
- H10W 72/019: {of bond pads}
- H10W 72/072: {of bump connectors}
- H10W 72/07207: {Temporary substrates, e.g. removable substrates}
- H10W 72/07211: {Treating the bond pad before connecting, e.g. by applying flux or cleaning}
- H10W 72/07223: {Active alignment, e.g. using optical alignment using marks or sensors}
- H10W 72/07236: {Soldering or alloying}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07307: {the auxiliary member being a temporary substrate, e.g. a removable substrate}
- H10W 72/07338: {hardening the adhesive by curing, e.g. thermosetting}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/354: {comprising polymers}
- H10W 72/9413: {on encapsulations}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A package includes a first layer of molding material, a first metallization layer on the first layer of molding material, a second layer of molding material on the first metallization layer and the first layer of molding material, a second metallization layer on the second layer of molding material, through vias within the second layer of molding material, the through vias extending from the first metallization layer to the second metallization layer, integrated passive devices within the second layer of molding material, a redistribution structure electrically on the second metallization layer and the second layer of molding material, the redistribution structure connected to the through vias and the integrated passive devices, and at least one semiconductor device on the redistribution structure, the at least one semiconductor device connected to the redistribution structure.

## Claims

### Claim 1

A method comprising:
forming a plurality of contact pads over a carrier substrate
forming a first insulating material layer over a carrier substrate, wherein the first insulating material layer laterally surrounds the plurality of contact pads;
forming a first metallization layer over the first insulating material layer, the first metallization layer comprising a first conductive element, the first conductive element being electrically coupled to a first contact pad of the plurality of contact pads;
forming a through via on the first contact pad;
placing a first integrated passive device over the first insulating material layer, wherein the first integrated passive device is laterally adjacent the through via;
after forming the through via and placing the first integrated passive device, depositing a first molding material over the first insulating material layer, the first molding material laterally surrounding the through via and laterally surrounding the first integrated passive device;
forming a redistribution structure over the first molding material, the redistribution structure electrically connected to the through via; and
placing a semiconductor device on the redistribution structure.

### Claim 2 (depends on 1)

The method of claim 1, wherein placing the first integrated passive device comprises electrically coupling the first integrated passive device to a second conductive element of the first metallization layer.

### Claim 3 (depends on 1)

The method of claim 1, wherein depositing the first molding material comprises depositing the first molding material along sidewalls of the first conductive element.

### Claim 4 (depends on 1)

The method of claim 1, further comprising placing a second integrated passive device on the redistribution structure, wherein the redistribution structure is between the first integrated passive device and the second integrated passive device.

### Claim 5 (depends on 1)

The method of claim 1, wherein the first integrated passive device comprises a capacitor.

### Claim 6 (depends on 1)

The method of claim 1, wherein forming the redistribution structure comprises forming an insulation layer on a top surface of the first molding material and on sidewalls of the first molding material and on sidewalls of the first insulating material layer.

### Claim 7 (depends on 1)

The method of claim 1, wherein forming the redistribution structure comprises forming a via contacting a contact pad of the first integrated passive device.

### Claim 8

A method, comprising:
forming a first insulating layer over a carrier substrate;
forming a first metallization layer on the first insulating layer, the first metallization layer comprising a first conductive element and a second conductive element;
forming a through via on the first conductive element;
attaching a first passive device to the second conductive element;
forming a second insulating layer over the first insulating layer, the first passive device, and the through via;
forming a redistribution structure on the second insulating layer, the redistribution structure comprising a third conductive element and a fourth conductive element, wherein the third conductive element is electrically coupled to the first passive device, wherein the fourth conductive element is electrically coupled to the through via, wherein forming the redistribution structure comprises forming a first dielectric layer over the second insulating layer, wherein the first dielectric layer extends along a sidewall of the second insulating layer; and
attaching a semiconductor die to the redistribution structure, the redistribution structure being between the semiconductor die and the first passive device.

### Claim 9 (depends on 8)

The method of claim 8, further comprising forming a plurality of contact pads over the carrier substrate, wherein forming the first insulating layer comprises forming the first insulating layer over the plurality of contact pads on a carrier substrate.

### Claim 10 (depends on 9)

The method of claim 9, wherein the first insulating layer is formed along sidewalls of the plurality of contact pads.

### Claim 11 (depends on 8)

The method of claim 8, wherein the second insulating layer is a molding material.

### Claim 12 (depends on 8)

The method of claim 8, further comprising performing a singulation process, wherein the singulation process removes the first dielectric layer from the sidewall of the second insulating layer.

### Claim 13 (depends on 8)

The method of claim 8, wherein the first insulating layer and the second insulating layer are a same material.

### Claim 14 (depends on 8)

The method of claim 8, further comprising removing the carrier substrate.

### Claim 15

A method, comprising:
forming a first insulating layer over a carrier substrate;
forming a first metallization layer on the first insulating layer, the first metallization layer comprising a first conductive element and a second conductive element;
attaching a first integrated passive device to the first conductive element of the first metallization layer, the first integrated passive device having a first contact on a first side and a second contact on a second side, wherein the first contact is coupled to the first conductive element of the first metallization layer;
forming a through via on the second conductive element of the first metallization layer;
forming a second insulating layer over the first insulating layer, wherein the second insulating layer extends along sidewalls of the first conductive element and the second conductive element;
forming a second metallization layer on the second insulating layer, the second metallization layer comprising a third conductive element and a fourth conductive element, wherein the third conductive element is coupled to the second contact of the first integrated passive device, wherein the fourth conductive element is coupled to the through via;
forming a redistribution structure on the second metallization layer; and
attaching a semiconductor device attached to the redistribution structure.

### Claim 16 (depends on 15)

The method of claim 15, further comprising forming an external contact pad on the carrier substrate prior to forming the first insulating layer, wherein the first insulating layer covers a sidewall of the external contact pad.

### Claim 17 (depends on 16)

The method of claim 16, further comprising removing the carrier substrate and recessing the external contact pad.

### Claim 18 (depends on 16)

The method of claim 16, further comprising forming a solder joint on the external contact pad.

### Claim 19 (depends on 16)

The method of claim 16, further comprising attaching a second integrated passive device coupled to the external contact pad.

### Claim 20 (depends on 15)

The method of claim 15, wherein the through via and the first integrated passive device have a same height.