# US 12,119,289 B2 · Semiconductor packages with roughened conductive components

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- Number: US 12,119,289 B2
- Document ID: US12119289B2
- Status: Granted
- Kind: B2
- Application number: 18/328,896
- Filed: 2023-06-05
- Published: 2023-10-05
- Granted: 2024-10-15
- Earliest claimed: 2020-12-31
- Assignees: Texas Instruments Incorporated
- Applicants: Texas Instruments Incorporated
- Inventors: Yee Gin Tea; Chong Han Lim
- Web page: https://patentgrep.com/patent/US12119289B2

## CPC

- H10W 70/424: {Cross-sectional shapes (H10W70/481 takes precedence)}
- H10W 70/041: {Connecting or disconnecting interconnections to or from leadframes, e.g. connecting bond wires or bumps}
- H10W 70/042: {Etching}
- H10W 70/411: {Chip-supporting parts, e.g. die pads}
- H10W 70/415: {Leadframe inner leads serving as die pads}
- H10W 70/417: {Bonding materials between chips and die pads}
- H10W 70/421: {Shapes or dispositions}
- H10W 70/457: {of metallic layers on leadframes}
- H10W 70/465: {Bumps or wires}
- H10W 72/30: Die-attach connectors
- H10W 72/50: Bond wires
- H10W 72/90: Bond pads, in general
- H10W 74/016: {using moulds}
- H10W 74/111: {the semiconductor body being completely enclosed}
- H10W 74/127: {characterised by arrangements for sealing or adhesion}
- H10W 74/129: {forming a chip-scale package [CSP]}
- H10W 72/075: {of bond wires}
- H10W 72/536: {the connected ends being ball-shaped}
- H10W 72/5363: {the connected ends being wedge-shaped}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/931: {Shapes of bond pads}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/726: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

In some examples, a semiconductor package comprises a die pad, a semiconductor die on the die pad, and a mold compound covering the die pad and the semiconductor die. The semiconductor package includes a conductive component including a roughened surface, the roughened surface having a roughness ranging from an arithmetic mean surface height (SA) of 1.4 to 3.2. The mold compound is coupled to the roughened surface. The semiconductor package includes a bond wire coupling the semiconductor die to the roughened surface. The bond wire is directly coupled to the roughened surface without a precious metal positioned therebetween.

## Claims

### Claim 1

A semiconductor package, comprising:
a die pad with a first roughened conductive surface;
a conductive lead with a second roughened conductive surface, wherein the first and second roughened conductive surfaces include nodules of non-precious metal;
a semiconductor die disposed over the first roughened conductive surface; and
a bond wire coupling the semiconductor die to the second roughened conductive surface, the bond wire directly coupled to the second roughened conductive surface.

### Claim 2 (depends on 1)

The semiconductor package of claim 1, wherein the first and second roughened conductive surfaces have a roughness ranging from an arithmetic mean surface height (SA) of 1.4 to 3.2.

### Claim 3 (depends on 1)

The semiconductor package of claim 1, wherein the bond wire fills an orifice in the second roughened conductive surface.

### Claim 4 (depends on 1)

The semiconductor package of claim 1, wherein the bond wire covers a protrusion of the second roughened conductive surface.

### Claim 5 (depends on 1)

The semiconductor package of claim 1, further comprising:
a mold compound encapsulating the die pad, the semiconductor die, and at least a portion of the conductive lead.

### Claim 6 (depends on 5)

The semiconductor package of claim 5, wherein the mold compound covers a protrusion of the second roughened conductive surface.

### Claim 7 (depends on 5)

The semiconductor package of claim 5, wherein the mold compound fills an orifice in the second roughened conductive surface.

### Claim 8 (depends on 5)

The semiconductor package of claim 5, wherein the mold compound forms a housing of the semiconductor package, and wherein the second roughened conductive surface terminates inside the housing.

### Claim 9 (depends on 8)

The semiconductor package of claim 8, wherein the conductive lead includes a part extended outside the housing, and wherein the part extended outside the housing has a surface that is even or smooth.

### Claim 10 (depends on 1)

The semiconductor package of claim 1, wherein an anti-tarnish layer covers the first roughened conductive surface.

### Claim 11 (depends on 10)

The semiconductor package of claim 10, wherein the anti-tarnish layer includes potassium sorbate, sodium dodecyl sulfate, sodium molybdate, benzotriazole, or a combination thereof.

### Claim 12 (depends on 10)

The semiconductor package of claim 10, further comprising:
an adhesive layer disposed between the anti-tarnish layer and the semiconductor die.

### Claim 13 (depends on 1)

The semiconductor package of claim 1, wherein the nodules of non-precious metal are plated on the die pad and on the conductive lead, respectively.

### Claim 14 (depends on 1)

The semiconductor package of claim 1, wherein the first and second roughened conductive surfaces include a copper-iron alloy.

### Claim 15

A semiconductor package, comprising:
a conductive lead with a roughened conductive surface including nodules of non-precious metal;
a solder ball directly coupled to the roughened conductive surface of the conductive lead; and
a semiconductor die attached to the solder ball, the semiconductor die including a surface with a circuit formed therein, wherein the surface of the semiconductor die faces the solder ball.

### Claim 16 (depends on 15)

The semiconductor package of claim 15, wherein the roughened conductive surface has a roughness ranging from an arithmetic mean surface height (SA) of 1.4 to 3.2.

### Claim 17 (depends on 15)

The semiconductor package of claim 15, wherein the solder ball fills an orifice in the roughened conductive surface.

### Claim 18 (depends on 15)

The semiconductor package of claim 15, wherein the solder ball covers a protrusion of the roughened conductive surface.

### Claim 19 (depends on 15)

The semiconductor package of claim 15, further comprising:
a mold compound encapsulating the semiconductor die, the solder ball, and at least a portion of the conductive lead.

### Claim 20 (depends on 19)

The semiconductor package of claim 19, wherein the mold compound covers a protrusion of the roughened conductive surface.

### Claim 21 (depends on 19)

The semiconductor package of claim 19, wherein the mold compound fills an orifice in the roughened conductive surface.

### Claim 22 (depends on 19)

The semiconductor package of claim 19, wherein the mold compound forms a housing of the semiconductor package, the roughened conductive surface terminating inside the housing.

### Claim 23 (depends on 19)

The semiconductor package of claim 19, wherein the semiconductor package is a quad flat no-lead (QFN) style package.

### Claim 24 (depends on 15)

The semiconductor package of claim 15, wherein the roughened conductive surface includes a copper-iron alloy.

### Claim 25 (depends on 15)

The semiconductor package of claim 15, wherein the nodules of non-precious metal are plated on the conductive lead.