# US 12,119,236 B2 · Method for producing a connection structure and semiconductor device

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- Number: US 12,119,236 B2
- Document ID: US12119236B2
- Status: Granted
- Kind: B2
- Application number: 17/442,624
- Filed: 2020-03-20
- Published: 2022-06-02
- Granted: 2024-10-15
- Earliest claimed: 2019-03-26
- Assignees: OSRAM Opto Semiconductors GmbH
- Applicants: OSRAM Opto Semiconductors GmbH
- Inventors: Andreas Rudolph; Teresa Baur; Christoph Klemp
- Web page: https://patentgrep.com/patent/US12119236B2

## CPC

- H10W 20/023: {the interconnections being through-semiconductor vias}
- H10W 70/095: {of vias therein}
- H10W 20/0245: {comprising use of blind vias during the manufacture}
- H10W 20/0261: {characterised by the filling method or the material of the conductive fill}
- H10W 20/0265: {characterised by the sidewall insulation}
- H10W 20/042: {the barrier, adhesion or liner layers being seed or nucleation layers}
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/635: {Through-vias}
- H10W 70/65: Shapes or dispositions of interconnections
- H10P 14/47: Electrolytic deposition, i.e. electroplating; Electroless plating
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method of manufacturing a connection structure may include forming an opening in a first main surface of a first substrate, forming a galvanic seed layer over a first main surface of a carrier substrate, and connecting the first main surface of the first substrate to the first main surface of the carrier substrate, such that the galvanic seed layer is arranged between the first main surface of the first substrate and the first main surface of the carrier substrate. The method may further include galvanically forming a conductive material over the galvanic seed layer.

## Claims

### Claim 1

A method of manufacturing a connection structure, wherein the method comprises:
forming an opening in a first main surface of a first substrate;
forming a galvanic seed layer over a first main surface of a carrier substrate;
forming a first insulating connection layer over the first main surface of the first substrate and over sidewalls of the opening;
applying a second connection layer over the galvanic seed layer,
connecting the first substrate to the carrier substrate, such that the galvanic seed layer is arranged between the first main surface of the first substrate and the first main surface of the carrier substrate and the first main surface of the first substrate is arranged between a second main surface of the first substrate and the carrier substrate;
wherein the galvanic seed layer is formed over the first main surface of the carrier substrate before the first substrate is connected to the carrier substrate;
thinning the first substrate such that the opening in the first substrate is opened on the second main surface of the first substrate facing away from the carrier substrate; removing the second connection layer from the surface of the opening facing the carrier substrate after the first substrate and the carrier substrate have been joined together such that part of the galvanic seed layer is exposed,
galvanically forming a conductive material over the galvanic seed layer; and
removing the carrier substrate after the second main surface of the first substrate has been connected to the second semiconductor substrate, wherein after removing the carrier substrate portions of the second connection layer are arranged over portions of the first substrate adjacent to the conductive material.

### Claim 2 (depends on 1)

The method according to claim 1, further comprising forming an insulation layer over sidewalls of the opening in the first substrate.

### Claim 3 (depends on 1)

The method according to claim 1, wherein the conductive material completely fills the opening in the first substrate.

### Claim 4 (depends on 1)

The method according to claim 1, wherein the opening in the first substrate has a width greater than 20 μm.

### Claim 5 (depends on 1)

The method according to claim 1, wherein a depth of the opening in the first substrate is greater than 50 μm.

### Claim 6 (depends on 1)

The method according to claim 1, further comprising forming a separating layer over the carrier substrate, wherein the separating layer is arranged between the galvanic seed layer and the first main surface of the carrier substrate.

### Claim 7 (depends on 1)

The method according to claim 1, further comprising connecting the second main surface of the first substrate to a second semiconductor substrate within which a functional portion is arranged such that the functional portion is electrically connected to the conductive material.

### Claim 8 (depends on 1)

A semiconductor device obtained by the method according to claim 1.

### Claim 9 (depends on 1)

The method according to claim 1, wherein a material of the first insulating connection layer is identical with the material of the second connection layer.

### Claim 10 (depends on 6)

The method according to claim 6, wherein removing the carrier substrate comprises detaching the carrier substrate from the separating layer.