System and method for fast diagnosis of register of lockstep module of slow clock domain
AssigneeNanjing SemiDrive Technology LTD.
InventorMuwei Zhang
Life of this patent
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Abstract
A system for diagnosing a register of a lockstep module of a slow clock domain, includes a functional intellectual property (IP) core and a lockstep IP core configured to work in the slow clock domain, a fast bus module configured to read a value of a register of the functional IP core and a value of a register of the lockstep IP core, and record a state change of the register of the functional IP core, and a central processing unit (CPU) configured to determine whether the register of the functional IP core and the register of the lockstep IP core are normal according to the value of the register of the functional IP core, the value of the register of the lockstep IP core, and the state change of the register of the functional IP core.
Claims20
A system for diagnosing a register of a lockstep module of a slow clock domain, comprising:
- a functional intellectual property (IP) core and a lockstep IP core configured to work in the slow clock domain;
- a fast bus module configured to:
- read a value of a register of the functional IP core and a value of a register of the lockstep IP core;
- and
- record a state change of the register of the functional IP core;
- and
- a central processing unit (CPU) configured to determine whether the register of the functional IP core and the register of the lockstep IP core are normal according to the value of the register of the functional IP core, the value of the register of the lockstep IP core, and the state change of the register of the functional IP core.
A method for diagnosing a register of a lockstep module of a slow clock domain, comprising:
- allocating a read and write address of a register of a functional intellectual property (IP) core and a register of a lockstep IP core of the slow clock domain;
- reading a value of the register of the functional IP core and a value of the register of the lockstep IP core, and recording a state change of the register of the functional IP core;
- and
- determining whether the register of the functional IP core and the register of the lockstep IP core are normal according to the value of the register of the functional IP core, the value of the register of the lockstep IP core, and the state change of the register of the functional IP core.
A non-transitory computer-readable storage medium storing a computer program that, when the computer program being executed by at least one processor, causing the at least one processor to perform:
- allocating read and write addresses of a register of a functional intellectual property (IP) core and a register of a lockstep IP core of a slow clock domain;
- reading a value of the register of the functional IP core and a value of the register of the lockstep IP core, and recording a state change of the register of the functional IP core and a state change of the register of the lockstep IP core;
- and
- determining whether the register of the functional IP core and the register of the lockstep IP core are normal according to the value of the register of the functional IP core, the value of the register of the lockstep IP core, and the state change of the register of the functional IP core.
Dependencies are inferred from the claim text.