# US 12,114,501 B2 · Vertical semiconductor device and method for fabricating the same

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- Number: US 12,114,501 B2
- Document ID: US12114501B2
- Status: Granted
- Kind: B2
- Application number: 18/317,692
- Filed: 2023-05-15
- Published: 2023-09-14
- Granted: 2024-10-08
- Earliest claimed: 2019-11-29
- Assignees: SK hynix Inc.
- Applicants: SK hynix Inc.
- Inventors: Jin-Ha Kim
- Web page: https://patentgrep.com/patent/US12114501B2

## CPC

- H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10W 20/42: Vias, e.g. via plugs
- H10W 20/4451: {Semiconductor materials, e.g. polysilicon}
- H10W 20/47: comprising two or more dielectric layers having different properties, e.g. different dielectric constants
- H10D 64/037: {comprising charge-trapping insulators}
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method for fabricating a semiconductor device includes: forming a first multi-layer stack including liner layers and a source sacrificial layer over a lower structure; forming a second multi-layer stack including dielectric layers and sacrificial layers over the first multi-layer stack; forming a vertical contact recess extending through the second multi-layer stack and the source sacrificial layer; replacing the source sacrificial layer with a source contact layer; forming a carbon-containing spacer on sidewall of the vertical contact recess; replacing the sacrificial layers with conductive layers; and forming a source contact plug in the vertical contact recess.

## Claims

### Claim 1

A method for fabricating a semiconductor device, comprising:
forming a first multi-layer stack including liner layers and a source sacrificial layer over a lower structure;
forming a second multi-layer stack including dielectric layers and sacrificial layers over the first multi-layer stack;
forming a vertical contact recess extending through the second multi-layer stack and the source sacrificial layer;
replacing the source sacrificial layer with a source contact layer;
replacing the sacrificial layers with conductive layers;
forming a seed layer on a sidewall of the vertical contact recess to seal the conductive layers;
forming a carbon-containing spacer on the seed layer; and
forming a source contact plug in the vertical contact recess.

### Claim 2 (depends on 1)

The method of claim 1, wherein the carbon-containing spacer includes a material having a wet-etch resistance greater than that of the dielectric layers.

### Claim 3 (depends on 1)

The method of claim 1, wherein the carbon-containing spacer includes a carbon-containing silicon oxide.

### Claim 4 (depends on 1)

The method of claim 1, wherein the carbon-containing spacer includes a material that has a wet-etch resistance greater than that of SiO2 and a dielectric constant lower than that of silicon nitride.

### Claim 5 (depends on 1)

The method of claim 1, wherein the carbon-containing spacer includes SiCO, and a carbon content of SiCO is less than a silicon content and an oxygen content.

### Claim 6 (depends on 1)

The method of claim 1, wherein the carbon-containing spacer is disposed between the conductive layers and the source contact plug, and extend in a stack direction of the conductive layers and the dielectric layers to seal one or more ends of the conductive layers.

### Claim 7 (depends on 1)

The method of claim 1, further comprising:
forming a lower source layer over the lower structure;
forming a first liner layer over the lower source layer;
forming a second liner layer over the source sacrificial layer; and
forming an upper source layer over the second liner layer,
wherein the source sacrificial layer disposed between the first liner layer and the second liner layer, and
wherein the second multi-layer stack disposed on the upper source layer.

### Claim 8 (depends on 7)

The method of claim 7, wherein the first liner layer, or the second liner layer, or both include a silicon oxide or a carbon-containing silicon oxide.

### Claim 9 (depends on 7)

The method of claim 7, wherein the first liner layer includes a silicon oxide, and the second liner layer includes a carbon-containing silicon oxide.

### Claim 10 (depends on 1)

The method of claim 1, further comprising:
forming a lower source layer over the lower structure;
forming a first liner layer over the lower source layer; and
forming a second liner layer over the source sacrificial layer,
wherein the source sacrificial layer disposed between the first liner layer and the second liner layer,
wherein the second multi-layer stack disposed on the second liner layer, and
wherein the first liner layer is formed of a silicon oxide, and the second liner layer is formed of SiCO.

### Claim 11 (depends on 1)

The method of claim 1, wherein the seed layer includes silicon oxide layer or silicon nitride.

### Claim 12 (depends on 1)

The method of claim 1, wherein the dielectric layers are formed of carbon-free silicon oxide, and the carbon-containing spacer is formed of carbon-containing silicon oxide.

### Claim 13 (depends on 1)

The method of claim 1, wherein the carbon-containing spacer includes one or more protrusions extending to seal one or more ends of the conductive layers, respectively.

### Claim 14 (depends on 1)

The method of claim 1, wherein the carbon-containing spacer is formed between the seed layer and the source contact plug.