# US 12,114,427 B2 · Method for fabricating assemble substrate > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,114,427 B2 - Document ID: US12114427B2 - Status: Granted - Kind: B2 - Application number: 17/831,301 - Filed: 2022-06-02 - Published: 2022-09-22 - Granted: 2024-10-08 - Earliest claimed: 2019-08-16 - Assignees: Siliconware Precision Industries Co., Ltd. - Applicants: Siliconware Precision Industries Co., Ltd. - Inventors: Lung-Yuan Wang; Wen-Liang Lien - Web page: https://patentgrep.com/patent/US12114427B2 ## CPC - H05K 1/144: {Stacked arrangements of planar printed circuit boards} - H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)} - H05K 1/111: {Pads for surface mounting, e.g. lay-out} - H05K 1/181: associated with surface mounted components - H05K 3/32: electrically connecting electric components or wires to printed circuits - H05K 3/4682: {Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil} - H10P 72/74: {using temporarily an auxiliary support} - H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)} - H10W 74/117: {the substrate having spherical bumps for external connection} - H10W 74/131: {the semiconductor body being only partially enclosed} - H10W 76/40: Fillings or auxiliary members in containers, e.g. centering rings (fillings or auxiliary members for thermal protection or control in containers or encapsulations H10W40/70) - H05K 1/0203: {Cooling of mounted components (H05K1/0272 takes precedence)} - H05K 3/007: {Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier (H05K1/187, H05K3/20 and H05K3/4682 take precedence)} - H05K 2201/042: Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other - H05K 2201/2018: Presence of a frame in a printed circuit or printed circuit assembly - H05K 2203/025: Abrading, e.g. grinding or sand blasting - H10P 72/7416: {used during dicing or grinding} - H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A method for fabricating an assemble substrate is provided, including stacking a circuit portion on a plurality of circuit members. The circuit members are spaced apart from one another in a current packaging process to increase a layer area. The assemble substrate thus fabricated meets the requirements for a packaging substrate of a large size, and has a high yield and low fabrication cost. ## Claims ### Claim 1 A method for fabricating an assemble substrate, comprising: providing a plurality of circuit members and at least one circuit portion on a carrying board, and electrically connecting the circuit portion to the plurality of circuit members, wherein the plurality of circuit members are spaced apart from one another, wherein the circuit portion is stacked on two of the plurality of circuit members, wherein the circuit portion and the plurality of circuit members are circuit boards, and wherein the circuit portion has a first width less than or equal to a second width between two of the plurality of circuit members, with the second width being greater than a width between any other two of the plurality of circuit members; and removing the carrying board. ### Claim 2 (depends on 1) The method of claim 1, wherein the circuit portion is staked on both sides of the plurality of circuit members. ### Claim 3 (depends on 1) The method of claim 1, further comprising providing a plurality of conductive bodies, via which the circuit members are stacked on and electrically connected to the circuit portion. ### Claim 4 (depends on 1) The method of claim 1, further comprising forming on the carrying board an encapsulation layer encapsulating the plurality of circuit members and the circuit portion. ### Claim 5 (depends on 4) The method of claim 4, wherein the circuit members or the circuit portion are exposed from the encapsulation layer. ### Claim 6 (depends on 4) The method of claim 4, wherein the assemble substrate has both opposing sides exposed from the encapsulation layer and stacked on and electrically connected to via a plurality of conductive bodies an electronic component or a conductive element. ### Claim 7 (depends on 4) The method of claim 4, further comprising, prior to forming the encapsulation layer, disposing on the carrying board a functional component surrounding the plurality of circuit members. ### Claim 8 (depends on 7) The method of claim 7, wherein the functional component is exposed from the encapsulation layer. ### Claim 9 (depends on 1) The method of claim 1, wherein the plurality of circuit members and the circuit portion are disposed by: placing the plurality of circuit members on the carrying board; and stacking the circuit portion on the plurality of circuit members. ### Claim 10 (depends on 1) The method of claim 1, wherein the plurality of circuit members and the circuit portion are disposed by: placing the circuit portion on the carrying board; and stacking the plurality of circuit members, with one side thereof, on the circuit portion. ### Claim 11 (depends on 10) The method of claim 10, further comprising stacking another circuit portion on the other side of the plurality of circuit members.