# US 12,114,419 B2 · Micro-ground vias for improved signal integrity for high-speed serial links > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,114,419 B2 - Document ID: US12114419B2 - Status: Granted - Kind: B2 - Application number: 17/713,347 - Filed: 2022-04-05 - Published: 2023-10-05 - Granted: 2024-10-08 - Earliest claimed: 2022-04-05 - Assignees: Dell Products L.P. - Applicants: Dell Products L.P. - Inventors: William Andrew Smith; Mallikarjun Vasa; Bhyrav M. Mutnury - Web page: https://patentgrep.com/patent/US12114419B2 ## CPC - H05K 1/0218: {by printed shielding conductors, ground planes or power plane (H05K1/0236 takes precedence)} - H05K 1/0245: {Lay-out of balanced signal pairs, e.g. differential lines or twisted lines} - H05K 1/0219: {Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors} - H05K 1/0253: {Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings (H05K1/0251 takes precedence)} - H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)} - H05K 3/42: Plated through-holes {or plated via connections} - H05K 2201/09518: Deep blind vias, i.e. blind vias connecting the surface circuit to circuit layers deeper than the first buried circuit layer - H05K 2201/09545: Plated through-holes or blind vias without lands - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract An information handling system includes a printed circuit board, a surface mount connector including first and second surface mount connector portions, first and second different pairs, and a ground plane. The first and second surface mount connector portions are mounted on the printed circuit board. The first differential pair is located on the first surface mount connector portion, and the second differential pair is located on the second surface mount connector portion. The ground plane is located in between the first and second surface mount connector portions within the printed circuit board. The first ground via is in physical communication with the ground plane and a first ground pad on a surface of the printed circuit board. The second ground via is in physical communication with the ground plane and a second ground pad on the surface of the printed circuit board. ## Claims ### Claim 1 An information handling system comprising: a printed circuit board; a surface mount connector mounted on the printed circuit board, the surface mount connector includes first and second surface mount connector portions; a first differential pair on the first surface mount connector portion; a second differential pair on the second surface mount connector portion; a ground pad of the surface mount connector located in between the first and second surface mount connector portions; a first ground via in physical communication with a first ground plane within the printed circuit board, with the ground pad of the surface mount connector, and with a first ground pad on a surface of the printed circuit board, wherein the first ground via is a micro-via, wherein the first ground pad is in physical communication with the ground pad of the surface mount connector; and a second ground via in physical communication with a second ground plane within the printed circuit board, with the ground pad of the surface mount connector, and with a second ground pad on the surface of the printed circuit board, wherein a signal layer is located in a plane of the printed circuit board in between a surface of the printed circuit board and the second ground plane, wherein the second ground pad is in physical communication with the ground pad of the surface mount connector, wherein the second ground via is a skip via, wherein the first and second ground pads are on a same surface of the printed circuit board, wherein the first and second ground vias extend from the surface of the printed circuit board to respective ones of the first and second ground planes within the printed circuit board. ### Claim 2 (depends on 1) The information handling system of claim 1, wherein the printed circuit board includes: multiple layers within the printed circuit board, wherein a signal trace is routed on a layer of the multiple layers located further from the surface than the ground plane. ### Claim 3 (depends on 1) The information handling system of claim 1, wherein the first ground plane is a solid ground plane in a layer near the surface of the printed circuit board. ### Claim 4 (depends on 3) The information handling system of claim 3, wherein the layer is a first layer away from the surface of the printed circuit board. ### Claim 5 (depends on 1) The information handling system of claim 1, wherein the second ground plane is a solid ground plane in a second layer away from the surface of the printed circuit board. ### Claim 6 (depends on 1) The information handling system of claim 1, wherein a combination of the first and second ground planes, the ground pad of the surface mount connector, the first and second ground vias, and the first and second ground pads blocks fields generated by the first surface mount connector portion from causing crosstalk at the second surface mount connector portion. ### Claim 7 (depends on 1) The information handling system of claim 1, wherein the first and second ground vias are positioned in a substantially straight line in between the first and second surface mount connector portions. ### Claim 8 (depends on 1) The information handling system of claim 1, wherein the first and second ground vias are positioned at different angles from a substantially straight line between the first and second surface mount connector portions. ### Claim 9 An information handling system comprising: a printed circuit board including multiple inner layers; a surface mount connector mounted on the printed circuit board, the surface mount connector includes first and second surface mount connector portions; a first differential pair on the first surface mount connector portion; a second differential pair on the second surface mount connector portion; a ground pad of the surface mount connector located in between the first and second surface mount connector portions within the printed circuit board; a first ground via in physical communication with a first ground plane within the printed circuit board, with the ground pad of the surface mount connector, and with a first ground pad on a surface of the printed circuit board, wherein the first ground via is a micro-via, wherein the first ground pad is in physical communication with the ground pad of the surface mount connector; and a second ground via in physical communication with a second ground plane within the printed circuit board, with the ground pad of the surface mount connector, and with a second ground pad on the surface of the printed circuit board, wherein a signal layer is located in a plane of the printed circuit board in between a surface of the printed circuit board and the second ground plane, wherein the second ground pad is in physical communication with the ground pad of the surface mount connector, wherein the second ground via is a skip via, wherein the first and second ground pads are on a same surface of the printed circuit board, wherein the first and second ground vias extend from the surface of the printed circuit board to respective ones of the first and second ground planes within the printed circuit board, wherein a combination of the first and second ground planes, the ground pad of the surface mount connector, the first and second ground vias, and the first and second ground pads blocks fields generated by the first surface mount connector portion from causing crosstalk at the second surface mount connector portion. ### Claim 10 (depends on 9) The information handling system of claim 9, wherein the first ground plane is a solid ground plane in a layer near the surface of the printed circuit board. ### Claim 11 (depends on 10) The information handling system of claim 10, wherein the layer is a first layer away from the surface of the printed circuit board. ### Claim 12 (depends on 9) The information handling system of claim 9, wherein the second ground plane is a solid ground plane in a second layer away from the surface of the printed circuit board. ### Claim 13 (depends on 9) The information handling system of claim 9, wherein the first and second ground vias are positioned in a substantially straight line in between the first and second surface mount connector portions. ### Claim 14 (depends on 9) The information handling system of claim 9, wherein the first and second ground vias are positioned at different angles from a substantially straight line between the first and second surface mount connector portions.