# US 12,113,535 B2 · Ring oscillator and test method

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- Number: US 12,113,535 B2
- Document ID: US12113535B2
- Status: Granted
- Kind: B2
- Application number: 17/837,055
- Filed: 2022-06-10
- Published: 2023-09-21
- Granted: 2024-10-08
- Earliest claimed: 2022-03-18
- Assignees: Changxin Memory Technologies, Inc.
- Applicants: Changxin Memory Technologies, Inc.
- Inventors: Chan Chen; Anping Qiu
- Web page: https://patentgrep.com/patent/US12113535B2

## CPC

- H03K 3/0315: {Ring oscillators}
- G01R 31/2849: {Environmental or reliability testing, e.g. burn-in or validation tests (of individual semiconductors G01R31/2642; of printed circuits boards G01R31/2817; of IC's G01R31/2855)}
- G01R 31/2879: {related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads}
- G01R 31/2884: {using dedicated test connectors, test elements or test circuits on the IC under test (G01R31/2855 takes precedence)}
- H03K 3/011: Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature {(to maintain energy constant H03K3/015)}
- H03K 19/20: characterised by logic function, e.g. AND, OR, NOR, NOT circuits (H03K19/003 - H03K19/01 take precedence)
- G01R 31/2642: {Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests}
- H10P 74/207: {Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics}
- H10P 74/277: {Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers}
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Embodiments provide a ring oscillator and test method. The ring oscillator includes a first logic gate, a second logic gate, and a switch circuit. The first logic gate is configured to receive a test signal. The second logic gate includes a first NAND gate and a first NOR gate connected in sequence. An output terminal of the second logic gate is connected to an input terminal of the first logic gate, and the second logic gate is configured to receive output of the first logic gate to form a loop. The switch circuit includes a first switch circuit and a second switch circuit. The first switch circuit may be configured to control on/off of a power supply terminal of the first NAND gate and a ground terminal of the first NOR gate. The second switch circuit is configured to control on/off of a ground terminal of the first NAND gate.

## Claims

### Claim 1

A ring oscillator comprising:
a first logic gate configured to receive a test signal, wherein the first logic gate is a third NOR gate;
a second logic gate comprising a first NAND gate and a first NOR gate connected in sequence, an output terminal of the second logic gate being connected to an input terminal of the first logic gate, and the second logic gate being configured to receive output of the first logic gate to form a loop; and
a switch circuit comprising a first switch circuit and a second switch circuit, the first switch circuit being configured to control on/off of a power supply terminal of the first NAND gate and a ground terminal of the first NOR gate, and the second switch circuit being configured to control on/off of a ground terminal of the first NAND gate.

### Claim 2 (depends on 1)

The ring oscillator according to claim 1, wherein the second logic gate is further provided with a plurality of pairs of second NAND gates and second NOR gates, an input terminal of the second NAND gate being connected to an output terminal of the first NOR gate, an output terminal of the second NAND gate being connected to an input terminal of the second NOR gate, and an output terminal of the second NOR gate being connected to the input terminal of the first logic gate.

### Claim 3 (depends on 2)

The ring oscillator according to claim 2, wherein a size of the first NAND gate and a size of the second NAND gate are smaller than a standard value, a size of first NOR gate and a size of the second NOR gate being greater than the standard value.

### Claim 4 (depends on 1)

The ring oscillator according to claim 1, wherein a size of the first switch circuit is smaller than a size of the second switch circuit.

### Claim 5

A test circuit comprising a ring oscillator, wherein the ring oscillator comprises:
a first logic gate configured to receive a test signal, wherein the first logic gate is a third NOR gate;
a second logic gate comprising a first NAND gate and a first NOR gate connected in sequence, an output terminal of the second logic gate being connected to an input terminal of the first logic gate, and the second logic gate being configured to receive output of the first logic gate to form a loop; and
a switch circuit comprising a first switch circuit and a second switch circuit, the first switch circuit being configured to control on/off of a power supply terminal of the first NAND gate and a ground terminal of the first NOR gate, and the second switch circuit being configured to control on/off of a ground terminal of the first NAND gate.

### Claim 6 (depends on 1)

A test method for negative bias temperature instability (NBTI) being applied to the ring oscillator according to claim 1, the test method comprising:
switching on each switch in the switch circuit to obtain an initial frequency of the ring oscillator, the initial frequency being an oscillation frequency of an initial signal outputted by the ring oscillator;
setting a test signal and sending a control signal, the control signal being configured for controlling on/off of each switch in the switch circuit to control stresses borne different logic gates in the ring oscillator, and different control signals being configured for controlling the ring oscillator to bear different stress states during test;
switching on each switch in the switch circuit after a preset time interval to obtain a stress frequency, the stress frequency being an oscillation frequency of a current test signal outputted by the ring oscillator; and
determining an impact of NBTI effects on the ring oscillator according to the initial frequency, the stress frequency, and the preset time interval; and, wherein
setting the test signal and sending the control signal further comprises:
setting an input terminal of the third NOR gate to a high level, and sending a fourth control signal configured for switching on the first switch circuit and the second switch circuit.