# US 12,113,528 B2 · Output driver using feedback network for slew rate reduction and associated output driving method > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,113,528 B2 - Document ID: US12113528B2 - Status: Granted - Kind: B2 - Application number: 17/868,739 - Filed: 2022-07-19 - Published: 2023-07-27 - Granted: 2024-10-08 - Earliest claimed: 2022-01-26 - Assignees: Airoha Technology Corp. - Applicants: Airoha Technology Corp. - Inventors: Huan-Sheng Chen - Web page: https://patentgrep.com/patent/US12113528B2 ## CPC - H03K 19/00346: {Modifications for eliminating interference or parasitic voltages or currents} - H03K 19/0005: {Modifications of input or output impedance} - H03K 19/0948: using CMOS {or complementary insulated gate field-effect transistors} - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract An output driver includes a first pre-driver circuit, a first driver circuit, a second pre-driver circuit, a second driver circuit, and a feedback network. The first pre-driver circuit pre-drives a first data input signal to generate a first pre-driving output signal. The first driver circuit drives the first pre-driving output signal to generate a first data output signal. The second pre-driver circuit pre-drives a second data input signal to generate a second pre-driving output signal, wherein the first data input signal and the second data input signal are a differential input of the output driver. The second driver circuit drives the second pre-driving output signal to generate a second data output signal. The feedback network performs a latching operation upon the first pre-driving output signal and the second pre-driving output signal according to the first data output signal and the second data output signal. ## Claims ### Claim 1 An output driver comprising: a first pre-driver circuit, arranged to receive a first data input signal to generate a first pre-driving output signal; a first driver circuit, arranged to receive the first pre-driving output signal to generate a first data output signal; a second pre-driver circuit, arranged to receive a second data input signal to generate a second pre-driving output signal, wherein the first data input signal and the second data input signal are a differential input of the output driver; a second driver circuit, arranged to receive the second pre-driving output signal to generate a second data output signal; and a feedback network, arranged to perform a latching operation upon the first pre-driving output signal and the second pre-driving output signal according to the first data output signal and the second data output signal, wherein the feedback network comprises: a first feedback path, coupled between an output port of the first driver circuit and an output port of the second pre-driver circuit; and a second feedback path, coupled between an output port of the second driver circuit and an output port of the first pre-driver circuit, wherein each of the first feedback path and the second feedback path comprises an even number of inverter circuits connected in series. ### Claim 2 (depends on 1) The output driver of claim 1, wherein the first feedback path comprises a first inverter circuit, the second feedback path comprises a second inverter circuit, and the feedback network further comprises: a third inverter circuit, having an input port coupled to an output port of the second inverter circuit, and an output port coupled to an output port of the first inverter circuit; and a fourth inverter circuit, having an input port coupled to the output port of the first inverter circuit, and an output port coupled to the output port of the second inverter circuit. ### Claim 3 (depends on 1) The output driver of claim 1, wherein the first feedback path comprises a first inverter circuit, the second feedback path comprises a second inverter circuit, and the feedback network further comprises: a third inverter circuit, having an input port coupled to an input port of the second inverter circuit, and an output port coupled to an input port of the first inverter circuit; and a fourth inverter circuit, having an input port coupled to the input port of the first inverter circuit, and an output port coupled to the input port of the second inverter circuit. ### Claim 4 (depends on 1) The output driver of claim 1, wherein the output driver is a part of a Serializer/Deserializer (SerDes) circuit. ### Claim 5 An output driver comprising: a first pre-driver circuit, arranged to receive a first data input signal to generate a first pre-driving output signal; a first driver circuit, arranged to receive the first pre-driving output signal to generate a first data output signal; a second pre-driver circuit, arranged to receive a second data input signal to generate a second pre-driving output signal, wherein the first data input signal and the second data input signal are a differential input of the output driver; a second driver circuit, arranged to receive the second pre-driving output signal to generate a second data output signal; and a feedback network, arranged to perform a latching operation upon the first pre-driving output signal and the second pre-driving output signal according to the first data output signal and the second data output signal, wherein the feedback network comprises: a first feedback path, coupled between an output port of the first driver circuit and an output port of the first pre-driver circuit; and a second feedback path, coupled between an output port of the second driver circuit and an output port of the second pre-driver circuit. ### Claim 6 (depends on 5) The output driver of claim 5, wherein each of the first feedback path and the second feedback path comprises an odd number of inverter circuits connected in series. ### Claim 7 (depends on 6) The output driver of claim 6, wherein the first feedback path comprises a first inverter circuit, the second feedback path comprises a second inverter circuit, and the feedback network further comprises: a third inverter circuit, having an input port coupled to an output port of the first inverter circuit, and an output port coupled to an input port of the first inverter circuit; and a fourth inverter circuit, having an input port coupled to an output port of the second inverter circuit, and an output port coupled to an input port of the second inverter circuit. ### Claim 8 An output driving method comprising: receiving a first data input signal to generate a first pre-driving output signal; receiving the first pre-driving output signal to generate a first data output signal; receiving a second data input signal to generate a second pre-driving output signal, wherein the first data input signal and the second data input signal are a differential input; receiving the second pre-driving output signal to generate a second data output signal; and performing a latching operation upon the first pre-driving output signal and the second pre-driving output signal according to the first data output signal and the second data output signal, comprising: performing the latching operation upon the first pre-driving output signal according to the second data output signal, comprising: performing the latching operation upon the first pre-driving output signal by passing the second data output signal through a first feedback path with an even number of inverter circuits connected in series; and performing the latching operation upon the second pre-driving output signal according to the first data output signal, comprising: performing the latching operation upon the second pre-driving output signal by passing the first data output signal through a second feedback path with an even number of inverter circuits connected in series. ### Claim 9 (depends on 8) The output driving method of claim 8, wherein the first feedback path comprises a first inverter circuit, the second feedback path comprises a second inverter circuit, and performing the latching operation upon the first pre-driving output signal and the second pre-driving output signal according to the first data output signal and the second data output signal further comprises: coupling an input port of a third inverter circuit to an output port of the second inverter circuit, and coupling an output port of the third inverter circuit to an output port of the first inverter circuit; and coupling an input port of a fourth inverter circuit to the output port of the first inverter circuit, and coupling an output port of the fourth inverter to the output port of the second inverter circuit. ### Claim 10 (depends on 8) The output driving method of claim 8, wherein the first feedback path comprises a first inverter circuit, the second feedback path comprises a second inverter circuit, and performing the latching operation upon the first pre-driving output signal and the second pre-driving output signal according to the first data output signal and the second data output signal further comprises: coupling an input port of a third inverter circuit to an input port of the second inverter circuit, and coupling an output port of the third inverter circuit to an input port of the first inverter circuit; and coupling an input port of a fourth inverter circuit to the input port of the first inverter circuit, and coupling an output port of the fourth inverter circuit to the input port of the second inverter circuit. ### Claim 11 An output driving method comprising: receiving a first data input signal to generate a first pre-driving output signal; receiving the first pre-driving output signal to generate a first data output signal; receiving a second data input signal to generate a second pre-driving output signal, wherein the first data input signal and the second data input signal are a differential input; receiving the second pre-driving output signal to generate a second data output signal; and performing a latching operation upon the first pre-driving output signal and the second pre-driving output signal according to the first data output signal and the second data output signal, comprising: performing the latching operation upon the first pre-driving output signal according to the first data output signal; and performing the latching operation upon the second pre-driving output signal according to the second data output signal. ### Claim 12 (depends on 11) The output driving method of claim 11, wherein performing the latching operation upon the first pre-driving output signal according to the first data output signal comprises: performing the latching operation upon the first pre-driving output signal by passing the first data output signal through a first feedback path with an odd number of inverter circuits connected in series; and performing the latching operation upon the second pre-driving output signal according to the second data output signal comprises: performing the latching operation upon the second pre-driving output signal by passing the second data output signal through a second feedback path with an odd number of inverter circuits connected in series. ### Claim 13 (depends on 12) The output driving method of claim 12, wherein the first feedback path comprises a first inverter circuit, the second feedback path comprises a second inverter circuit, and performing the latching operation upon the first pre-driving output signal and the second pre-driving output signal according to the first data output signal and the second data output signal further comprises: coupling an input port of a third inverter circuit to an output port of the first inverter circuit, and coupling an output port of the third inverter circuit to an input port of the first inverter circuit; and coupling an input port of a fourth inverter circuit to an output port of the second inverter circuit, and coupling an output port of the fourth inverter circuit to an input port of the second inverter circuit. ### Claim 14 (depends on 8) The output driving method of claim 8, wherein the output driving method is employed by a Serializer/Deserializer (SerDes) circuit.