# US 12,113,505 B2 · Multilayer electronic component > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,113,505 B2 - Document ID: US12113505B2 - Status: Granted - Kind: B2 - Application number: 17/941,588 - Filed: 2022-09-09 - Published: 2023-03-16 - Granted: 2024-10-08 - Earliest claimed: 2021-09-14 - Assignees: TDK Corporation - Applicants: TDK Corporation - Inventors: Takuya Sato - Web page: https://patentgrep.com/patent/US12113505B2 ## CPC - H01G 4/40: Structural combinations of fixed capacitors with other electric elements, the structure mainly consisting of a capacitor, e.g. RC combinations - H03H 7/0115: {comprising only inductors and capacitors (H03H7/075, H03H7/09, H03H7/12, H03H7/13 take precedence)} - H01F 17/0013: {with stacked layers} - H01F 27/2804: {Printed windings} - H01F 27/40: Structural association with built-in electric component, e.g. fuse - H01G 4/30: Stacked capacitors (H01G4/33 takes precedence) - H03H 7/09: Filters comprising mutual inductance - H03H 7/463: {Duplexers} - H01F 27/2809: {on stacked layers} - H03H 7/1708: {Comprising bridging elements, i.e. elements in a series path without own reference to ground and spanning branching nodes of another series path (H03H7/07 takes precedence)} - H03H 7/1766: {Parallel LC in series path (H03H7/1783 takes precedence)} - H03H 7/1775: {Parallel LC in shunt or branch path (H03H7/1791 takes precedence)} - H03H 2001/0085: {Multilayer, e.g. LTCC, HTCC, green sheets} - H01G: CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE (selection of specified materials as dielectric H01B3/00; capacitors having potential barriers H10D1/62, H10K10/10) - H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P) - H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES ## Abstract An electronic component includes a stack and first and second inductors. The first inductor includes a first through hole column, a second through hole column, a first conductor layer portion, a second conductor layer portion, and a third conductor layer portion. The second conductor layer portion is connected to an end of the first through hole column and extends close to the second through hole column. The third conductor layer portion is connected to the second through hole column and extends close to the first through hole column. ## Claims ### Claim 1 A multilayer electronic component comprising: a stack including a plurality of dielectric layers that are stacked together; a first inductor integrated with the stack and wound about a first axis orthogonal to a stacking direction of the plurality of dielectric layers; and a second inductor integrated with the stack and wound about a second axis orthogonal to the stacking direction, wherein an area of a first region obtained by perpendicularly projecting a first space including the first axis and surrounded by the first inductor onto a virtual plane perpendicular to the first axis and an area of a second region obtained by perpendicularly projecting a second space including the second axis and surrounded by the second inductor onto a virtual plane perpendicular to the second axis are different from each other, the second inductor is disposed such that at least part of the second space overlaps part of the first space in a view in one direction parallel to the second axis, the first inductor includes a first through hole column, a second through hole column, a first conductor layer portion, a second conductor layer portion, and a third conductor layer portion, the first through hole column and the second through hole column are each constituted by two or more through holes connected in series to each other, the first conductor layer portion, the second conductor layer portion, and the third conductor layer portion each include at least one conductor layer, the first conductor layer portion connects one end of the first through hole column and one end of the second through hole column, the second conductor layer portion is connected to another end of the first through hole column, extends close to another end of the second through hole column, and is not connected to the second through hole column, and the third conductor layer portion is connected to the another end of the second through hole column, extends close to the another end of the first through hole column, and is not connected to the first through hole column. ### Claim 2 (depends on 1) The multilayer electronic component according to claim 1, wherein the first axis and the second axis are parallel to each other. ### Claim 3 (depends on 1) The multilayer electronic component according to claim 1, wherein the area of the first region is larger than the area of the second region. ### Claim 4 (depends on 1) The multilayer electronic component according to claim 1, wherein a dimension of the first space in the stacking direction is larger than a dimension of the second space in the stacking direction. ### Claim 5 (depends on 1) The multilayer electronic component according to claim 1, wherein the second inductor includes a plurality of conductor portions each wound less than once about the second axis, and at least one connection portion connecting the plurality of conductor portions in series. ### Claim 6 (depends on 1) The multilayer electronic component according to claim 1, further comprising: a first port; a second port; and a signal path connecting the first port and the second port, wherein the first inductor and the second inductor are each provided between the signal path and ground in circuit configuration. ### Claim 7 (depends on 6) The multilayer electronic component according to claim 6, wherein the second inductor includes a first conductor portion and a second conductor portion each wound less than once about the second axis, and a connection portion connecting the first conductor portion and the second conductor portion, the second conductor portion is provided between the first conductor portion and the ground in circuit configuration, and the first conductor portion and the first inductor are magnetically coupled to each other. ### Claim 8 (depends on 1) The multilayer electronic component according to claim 1, further comprising: a plurality of signal terminals; and at least one ground terminal, wherein the stack has a bottom surface and a top surface located at respective ends in the stacking direction and four side surfaces connecting the bottom surface and the top surface, and the plurality of signal terminals and the at least one ground terminal are disposed on the bottom surface. ### Claim 9 (depends on 8) The multilayer electronic component according to claim 8, wherein the third conductor layer portion is disposed between the first conductor layer portion and the bottom surface, and the third conductor layer portion extends across one of the plurality of signal terminals in a view in one direction parallel to the stacking direction. ### Claim 10 (depends on 8) The multilayer electronic component according to claim 8, wherein the at least one ground terminal includes a first ground terminal and a second ground terminal, the first inductor is electrically connected to the first ground terminal, and the second inductor is electrically connected to the second ground terminal. ### Claim 11 (depends on 1) The multilayer electronic component according to claim 1, further comprising a circuit integrated with the stack and including neither the first inductor nor the second inductor. ### Claim 12 A multilayer electronic component comprising: a stack including a plurality of dielectric layers that are stacked together; a first inductor integrated with the stack and wound about a first axis orthogonal to a stacking direction of the plurality of dielectric layers; a second inductor integrated with the stack and wound about a second axis orthogonal to the stacking direction; a first port; a second port; and a signal path connecting the first port and the second port, wherein the first inductor and the second inductor are each provided between the signal path and ground in circuit configuration, an area of a first region obtained by perpendicularly projecting a first space including the first axis and surrounded by the first inductor onto a virtual plane perpendicular to the first axis and an area of a second region obtained by perpendicularly projecting a second space including the second axis and surrounded by the second inductor onto a virtual plane perpendicular to the second axis are different from each other, the second inductor is disposed such that at least part of the second space overlaps part of the first space in a view in one direction parallel to the second axis, the first inductor includes a first through hole column, a second through hole column, a first conductor layer portion, a second conductor layer portion, and a third conductor layer portion, the first through hole column and the second through hole column are each constituted by two or more through holes connected in series to each other, the first conductor layer portion, the second conductor layer portion, and the third conductor layer portion each include at least one conductor layer, the first conductor layer portion connects one end of the first through hole column and one end of the second through hole column, the second conductor layer portion is connected to another end of the first through hole column and extends close to another end of the second through hole column, the third conductor layer portion is connected to the another end of the second through hole column and extends close to the another end of the first through hole column, the second inductor includes a first conductor portion and a second conductor portion each wound less than once about the second axis, and a connection portion connecting the first conductor portion and the second conductor portion, the second conductor portion is provided between the first conductor portion and the ground in circuit configuration, and the first conductor portion and the first inductor are magnetically coupled to each other.