Wideband current-mode low-pass filter circuits

A filter circuit comprising:

• an input node;
• an output node;
• a power supply node;
• a first transistor comprising a drain coupled to the input node;
• a second transistor comprising a drain coupled to the output node and comprising a gate coupled to a gate of the first transistor;
• a capacitive element coupled between the drain of the first transistor and the power supply node;
• a first resistive element coupled between the drain and the gate of the first transistor;
• a second resistive element including a first terminal coupled to the gate of the first transistor and including a second terminal coupled to the gate of the second transistor, wherein the first resistive element comprises a first terminal coupled to the drain of the first transistor and comprises a second terminal coupled to the second terminal of the second resistive element and to the gate of the second transistor;
• a first source degeneration element coupled between a source of the first transistor and the power supply node;
• and
• a second source degeneration element coupled between a source of the second transistor and the power supply node.

A filter circuit comprising:

• an input node;
• an output node;
• a power supply node;
• a first transistor comprising a drain coupled to the input node;
• a second transistor comprising a drain coupled to the output node and comprising a gate coupled to a gate of the first transistor;
• a capacitive element coupled between the drain of the first transistor and the power supply node;
• a first resistive element coupled between the drain and the gate of the first transistor;
• a first source degeneration element coupled between a source of the first transistor and the power supply node;
• and
• a second source degeneration element coupled between a source of the second transistor and the power supply node, wherein:
• the first source degeneration element comprises a third transistor including a drain coupled to the source of the first transistor and including a source coupled to the power supply node;
• the second source degeneration element comprises a fourth transistor including a drain coupled to the source of the second transistor and including a source coupled to the power supply node;
• and
• the third transistor comprises a gate coupled to a gate of the fourth transistor and to the gate of the second transistor.

A filter circuit comprising:

• an input node;
• an output node;
• a power supply node;
• a first capacitive element coupled between the input node and the power supply node;
• a first transistor;
• a second transistor comprising a drain coupled to the output node and comprising a gate coupled to a gate and a drain of the first transistor;
• a third transistor comprising a drain coupled to the drain of the first transistor and comprising a source coupled to the input node;
• a second capacitive element coupled between the source and a gate of the third transistor;
• a first resistive element coupled between the gate of the third transistor and a bias node of the filter circuit;
• a first source degeneration element coupled between a source of the first transistor and the power supply node;
• and
• a second source degeneration element coupled between a source of the second transistor and the power supply node.