# US 12,113,490 B2 · Group III nitride-based radio frequency transistor amplifiers having source, gate and/or drain conductive vias > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,113,490 B2 - Document ID: US12113490B2 - Status: Granted - Kind: B2 - Application number: 18/517,065 - Filed: 2023-11-22 - Published: 2024-03-14 - Granted: 2024-10-08 - Earliest claimed: 2020-04-03 - Assignees: MACOM Technology Solutions Holdings, Inc. - Applicants: MACOM Technology Solutions Holdings, Inc. - Inventors: Basim Noori; Marvin Marbell; Qianli Mu; Kwangmo Chris Lim; Michael E. Watts; Mario Bokatius; Jangheon Kim - Web page: https://patentgrep.com/patent/US12113490B2 ## CPC - H03F 1/565: {using inductive elements} - H10W 44/20: at high-frequency [HF] or radio frequency [RF] - H03F 3/193: with field-effect devices (H03F3/195 takes precedence) - H03F 3/195: in integrated circuits - H10D 30/47: having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT] - H10D 64/257: {for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes (source or drain electrodes of TFTs H10D30/673)} - H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] - H10W 20/212: {Top-view shapes or dispositions, e.g. top-view layouts of the vias} - H10W 20/484: {Interconnections having extended contours, e.g. pads having mesh shape or interconnections comprising connected parallel stripes} - H10W 70/685: comprising multiple insulating layers - H10W 76/134: having other interconnections parallel to the conductive base - H03F 2200/222: A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier - H03F 2200/387: A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier - H03F 2200/451: the amplifier being a radio frequency amplifier - H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs} - H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN} - H10D 64/254: {for lateral devices wherein the source or drain electrodes extend entirely through the semiconductor bodies, e.g. via-holes for back side contacts} - H10W 40/10: Arrangements for heating - H10W 40/228: {the projecting parts being wire-shaped or pin-shaped} - H10W 44/206: {Wires} - H10W 44/209: {Vertical interconnections, e.g. vias} - H10W 44/226: {for HF amplifiers} - H10W 44/234: {Arrangements for impedance matching} - H10W 70/63: Vias, e.g. via plugs - H10W 70/635: {Through-vias} - H10W 70/655: Fan-out layouts - H10W 70/656: Fan-in layouts - H10W 72/0198: {batch processes} - H10W 72/07254: {changes in dispositions} - H10W 72/07331: {Connecting techniques} - H10W 72/07554: {changes in dispositions} - H10W 72/225: {Bumps having a filler embedded in a matrix} - H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias} - H10W 72/247: {Dispositions of multiple bumps} - H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu} - H10W 72/253: {not comprising solid metals or solid metalloids, e.g. polymers or ceramics} - H10W 72/29: Bond pads specially adapted therefor - H10W 72/325: {Die-attach connectors having a filler embedded in a matrix} - H10W 72/352: {comprising metals or metalloids, e.g. solders} - H10W 72/551: {Materials of bond wires} - H10W 72/59: Bond pads specially adapted therefor - H10W 72/856: {Bump connectors and die-attach connectors (bumps embedded in underfills H10W74/15)} - H10W 72/879: {Bump connectors and bond wires} - H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias} - H10W 72/944: {Dispositions of multiple bond pads} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 74/111: {the semiconductor body being completely enclosed} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/759: {between a chip and a laterally-adjacent discrete passive device} - H10W 90/794: {between a chip and a stacked insulating package substrate, interposer or RDL} - H03F: AMPLIFIERS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract RF transistor amplifiers include a Group III nitride-based RF transistor amplifier die that includes a semiconductor layer structure, a conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure. A first end of the additional conductive via is connected to a first external circuit and a second end of the additional conductive via that is opposite the first end is connected to a first matching circuit. ## Claims ### Claim 1 A radio frequency (“RF”) transistor amplifier, comprising: an interconnection structure having at least first and second conductive structures on an upper surface thereof; and a Group III nitride-based RF transistor amplifier die mounted on the upper surface of the interconnection structure, the Group III nitride-based RF transistor amplifier die including a semiconductor layer structure, at least one conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the at least one conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure, wherein a first end of the additional conductive via is connected to the first conductive structure through a contact that is interposed between the interconnection structure and the Group III nitride-based RF transistor amplifier die, wherein the additional conductive via is at least one of a conductive gate via and a conductive drain via. ### Claim 2 (depends on 1) The RF transistor amplifier of claim 1, wherein a second end of the additional conductive via that is opposite the first end is connected to a first external circuit. ### Claim 3 (depends on 1) The RF transistor amplifier of claim 1, wherein the additional conductive via is a conductive drain via. ### Claim 4 (depends on 3) The RF transistor amplifier of claim 3, further comprising a second additional conductive via, wherein the second additional conductive via is a conductive gate via. ### Claim 5 (depends on 1) The RF transistor amplifier of claim 1, further comprising: a passive RF component that includes a capacitor mounted on the interconnection structure and electrically connected to the additional conductive via through the interconnection structure. ### Claim 6 (depends on 1) The RF transistor amplifier of claim 1, wherein the Group III nitride-based RF transistor amplifier die includes a plurality of parallel source fingers and wherein at least two conductive source vias are positioned underneath each of the conductive source fingers. ### Claim 7 (depends on 6) The RF transistor amplifier of claim 6, wherein the at least two conductive source vias that are positioned underneath a first of the conductive source fingers define a first axis, and the at least two conductive source vias that are positioned underneath a second of the conductive source fingers that is adjacent the first of the conductive source vias defines a second axis, and wherein the additional conductive gate via is positioned between the first axis and the second axis when the Group III nitride-based RF transistor amplifier die is viewed from above. ### Claim 8 (depends on 4) The RF transistor amplifier of claim 4, wherein at least one of the conductive gate via and the conductive drain via has a different shape than at least one of the conductive source vias. ### Claim 9 (depends on 4) The RF transistor amplifier of claim 4, wherein at least one of the conductive gate via and the conductive drain via has a different cross-sectional area than at least one of the conductive source vias. ### Claim 10 (depends on 1) The RF transistor amplifier of claim 1, wherein a plastic protective material is provided on at least a top surface of the Group III nitride-based RF transistor amplifier die. ### Claim 11 (depends on 1) The RF transistor amplifier of claim 1, wherein the interconnection structure has a fan-out topology, and wherein a plastic coating covers an upper surface of the Group III nitride-based RF transistor amplifier die. ### Claim 12 (depends on 1) The RF transistor amplifier of claim 1, wherein the interconnection structure has a fan-in topology, and wherein a plastic overmold covers an upper surface and sidewalls of the Group III nitride-based RF transistor amplifier die. ### Claim 13 A radio frequency (“RF”) transistor amplifier, comprising: an interconnection structure; a Group III nitride-based RF transistor amplifier die on a top surface of the interconnection structure, the Group III nitride-based RF transistor amplifier die including a semiconductor layer structure that has a plurality of unit cell transistors in an upper portion thereof, a conductive source via, a conductive gate via, and a conductive drain via, each of which extends through the semiconductor layer structure; and a plurality of conductive contacts on a bottom surface of the interconnection structure. ### Claim 14 (depends on 13) The RF transistor amplifier of claim 13, wherein the interconnection structure is arranged in a fan-in arrangement. ### Claim 15 (depends on 14) The RF transistor amplifier of claim 14, wherein a plastic coating covers an upper surface of the Group III nitride-based RF transistor amplifier die. ### Claim 16 (depends on 15) The RF transistor amplifier of claim 15, wherein the interconnection structure comprises an RDL laminate substrate or an interposer. ### Claim 17 (depends on 13) The RF transistor amplifier of claim 13, wherein the interconnection structure comprises a redistribution layer (“RDL”) laminate substrate that includes an upper gate pad that is electrically connected to the conductive gate via, an upper drain pad that is electrically connected to the conductive drain via, and an upper source pad that is electrically connected to the conductive source via. ### Claim 18 (depends on 17) The RF transistor amplifier of claim 17, wherein the RDL laminate substrate further includes a lower gate pad that is electrically connected to the upper gate pad, a lower drain pad that is electrically connected to the upper drain pad, and a lower source pad that is electrically connected to the upper source pad, and wherein the conductive contacts include gate contacts that are mounted on the lower gate pad, drain contacts that are mounted on the lower drain pad, and source contacts that are mounted on the lower source pad. ### Claim 19 (depends on 18) The RF transistor amplifier of claim 18, wherein at least one of the gate contacts is located outside the footprint of the Group III nitride-based RF transistor amplifier die when the RF amplifier is viewed from above. ### Claim 20 (depends on 13) The RF transistor amplifier of claim 13, wherein the Group III nitride-based RF transistor amplifier die includes a plurality of parallel source fingers and the conductive source via is one of a plurality of source vias, wherein at least two conductive source vias are positioned underneath each of the conductive source fingers. ### Claim 21 (depends on 20) The RF transistor amplifier of claim 20, wherein the at least two conductive source vias that are positioned underneath a first of the conductive source fingers define a first axis, and the at least two conductive source vias that are positioned underneath a second of the conductive source fingers that is adjacent the first of the conductive source vias defines a second axis, and wherein the conductive gate via is positioned between the first axis and the second axis when the Group III nitride-based RF transistor amplifier die is viewed from above.