# US 12,113,159 B2 · Dual emission LED chip

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,113,159 B2
- Document ID: US12113159B2
- Status: Granted
- Kind: B2
- Application number: 17/419,623
- Filed: 2019-12-31
- Published: 2022-03-17
- Granted: 2024-10-08
- Earliest claimed: 2018-12-31
- Assignees: NANO-X GmbH
- Applicants: Nano-X
- Inventors: Du Jin Park; Pil Kuk Jang
- Web page: https://patentgrep.com/patent/US12113159B2

## CPC

- H10H 20/857: Interconnections, e.g. lead-frames, bond wires or solder balls
- H10H 20/01: Manufacture or treatment
- H10H 20/01335: {the light-emitting regions comprising nitride materials}
- H10H 20/018: {Bonding of wafers}
- H10H 20/819: characterised by their shape, e.g. curved or truncated substrates
- H10H 20/821: of the light-emitting regions, e.g. non-planar junctions
- H10H 20/8316: {Multi-layer electrodes comprising at least one discontinuous layer}
- H10H 20/855: Optical field-shaping means, e.g. lenses
- H10P 50/28: of insulating materials
- H10P 54/00: Cutting or separating of wafers, substrates or parts of devices
- H10P 72/70: for supporting or gripping
- H10P 76/00: Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10H 20/032: {of electrodes}
- H10H 20/034: {of coatings}
- H10H 20/036: {of packages}
- H10H 20/0362: {of encapsulations}
- H10H 20/0363: {of optical field-shaping means}
- H10H 20/0364: {of interconnections}
- H10H 20/81: Bodies
- H10H 20/813: having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies
- H10H 20/825: containing nitrogen, e.g. GaN
- H10H 20/8312: {extending at least partially through the bodies}
- H10H 20/835: {Reflective materials}
- H10H 20/84: Coatings, e.g. passivation layers or antireflective coatings
- H10H 20/854: characterised by their material, e.g. epoxy or silicone resins
- H10H 20/872: {Periodic patterns for optical field-shaping, e.g. photonic bandgap structures}
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Proposed is a dual emission LED chip that emits light to the upper and lower sides of a PN junction, wherein the duel emission LED chip uses the electroluminescent effect of the PN junction including a P layer and an N layer provided below the P layer, and characterized in that the dual emission LED chip emits light in the upward direction of the P layer and the downward direction of the N layer. The dual emission chip can be applied as a single chip to a field requiring dual emission, thereby enabling miniaturization of applied equipment, and increases power efficiency, thereby reducing manufacturing costs. In addition, as the dual emission LED chip can be manufactured through a batch process, a separate packaging process is not required.

## Claims

### Claim 1

A dual emission light-emitting diode (LED) chip comprising an LED chip which uses an electroluminescence effect of a P-N junction including a P-layer (P) and an N-layer (N) below the P-layer (P),
wherein light is emitted in each of an upward direction of the P-layer (P) and a downward direction of the N-layer (N),
wherein a P-direction connection unit is provided on an upper surface of the P-layer (P),
wherein an N-direction connection unit is provided on a lower surface of the N-layer (N),
wherein the P-direction connection unit provides a power connection to the P-layer (P),
wherein the N-direction connection unit provides a power connection to the N-layer (N), and
wherein the P-N junction is protected from an external environment by the P-direction connection unit and the N-direction connection unit.

### Claim 2 (depends on 1)

The dual emission LED chip of claim 1, wherein the P-layer (P) includes one or more P-direction mesa structures (PMSs) formed by engraving the P-layer (P) from the upper surface of the P-layer (P) to a predetermined depth of the N-layer (N), and the N-layer (N) includes one or more N-direction mesa structures (NMSs) formed by engraving the N-layer (N) from the lower surface of the N-layer (N) to a predetermined depth thereof.

### Claim 3 (depends on 1)

The dual emission LED chip of claim 1, wherein the P-direction connection unit includes a P-connection electrode provided on the upper surface of the P-layer (P), the P-layer (P) is connected to a power source from the upward direction thereof through the P-connection electrode, the N-direction connection unit includes an N-connection electrode provided on the lower surface of the N-layer (N), and the N-layer (N) is connected to the power source from the downward direction thereof through the N-connection electrode.

### Claim 4 (depends on 3)

The dual emission LED chip of claim 3, wherein the P-direction connection unit includes a P-direction ohmic contact electrode provided between the P-layer (P) and the P-connection electrode to form an ohmic contact between the P-layer (P) and the P-connection electrode, and
the N-direction connection unit includes an N-direction ohmic contact electrode provided between the N-layer (N) and the N-connection electrode to form an ohmic contact between the N-layer (N) and the N-connection electrode.

### Claim 5 (depends on 4)

The dual emission LED chip of claim 4, wherein the N-direction ohmic contact electrode is provided with a branch structure (BS).

### Claim 6 (depends on 3)

The dual emission LED chip of claim 3, wherein the P-connection electrode is provided in a form of a wall having a predetermined height in an upward direction from the upper surface of the P-layer (P) along an edge thereof, and the N-connection electrode is provided in a form of a wall having a predetermined height in a downward direction from the lower surface of the N-layer (N) along an edge thereof so that the P-connection electrode serves as a reflector for P-direction emission, and the N-connection electrode serves as a reflector for N-direction emission.

### Claim 7 (depends on 6)

The dual emission LED chip of claim 6, wherein the P-direction connection unit includes a P-direction encapsulant layer provided in a space surrounded by the upper surface of the P-layer (P) and the P-connection electrode to protect the P-layer (P) and convert a P-direction emission color, and
the N-direction connection unit includes an N-direction encapsulant layer provided in a space surrounded by an upper surface of the N-layer (N) and the N-connected electrode to protect the N-layer (N) and convert an N-direction emission color.

### Claim 8 (depends on 1)

The dual emission LED chip of claim 1, wherein a P-direction insulating part formed as a film having a predetermined thickness is provided on an outer surface of the P-N junction and an edge of the upper surface of the P-layer (P), and
an N-direction insulating part formed as a film having a predetermined thickness is provided on a lower surface of the P-direction insulating part and an edge of the lower surface of the N-layer (N).

### Claim 9 (depends on 1)

The dual emission LED chip of claim 1, further comprising a support metal part provided to be plated on outer surfaces of the P-N junction, the P-direction connection unit, and the N-direction connection unit.

### Claim 10

A dual emission light-emitting diode (LED) chip comprising an LED chip which uses an electroluminescence effect of a P-N junction including a P-layer (P) and an N-layer (N) below the P-layer (P), wherein light is emitted in each of an upward direction of the P-layer (P) and a downward direction of the N-layer (N), wherein a P-direction insulating part formed as a film having a predetermined thickness is provided on an outer surface of the P-N junction and an edge of the upper surface of the P-layer (P), and wherein an N-direction insulating part formed as a film having a predetermined thickness is provided on a lower surface of the P-direction insulating part and an edge of the lower surface of the N-layer (N).