# US 12,113,146 B2 · Optically controlled field effect transistor

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- Number: US 12,113,146 B2
- Document ID: US12113146B2
- Status: Granted
- Kind: B2
- Application number: 17/931,067
- Filed: 2022-09-09
- Published: 2023-03-09
- Granted: 2024-10-08
- Earliest claimed: 2021-09-09
- Assignees: The United States of America as represented by the Secretary of the Air Force
- Applicants: Government of the United States as Represented by the Secretary of the Air Force
- Inventors: Joseph Neil Merrett
- Web page: https://patentgrep.com/patent/US12113146B2

## CPC

- H10F 30/282: Insulated-gate field-effect transistors [IGFET], e.g. MISFET [metal-insulator-semiconductor field-effect transistor] phototransistors
- H10F 30/21: the devices being sensitive to infrared, visible or ultraviolet radiation
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION

## Abstract

A semiconductor structure configured to implement an optically controlled field effect transistor (FET). In one embodiment, a normally-off, optically controlled FET is realized as a semiconductor structure comprising various regions configured to implement a voltage controlled, normally on, high voltage FET region having integrated thereon a photoconductive region configured to reduce a gate-to-source voltage of the FET in response to light incident upon the photoconductive region so as to turn the FET on.

## Claims

### Claim 1

An optically controlled field effect transistor (FET), comprising:
a semiconductor structure configured to form a voltage controlled, normally on, high voltage FET; and
a photoconductive region integrated on the semiconductor structure and configured to reduce a gate-to-source voltage of the FET in response to light incident upon the photoconductive region.

### Claim 2 (depends on 1)

The optically controlled FET of claim 1, wherein the photoconductive region comprises a photoconductive semiconductor switch (PCSS).

### Claim 3 (depends on 1)

The optically controlled FET of claim 1, wherein the photoconductive region comprises a photodiode.

### Claim 4 (depends on 1)

The optically controlled FET of claim 1, wherein the photoconductive region comprises an optical bipolar phototransistor.

### Claim 5 (depends on 1)

The optically controlled FET of claim 1, wherein the FET comprises one of a junction field effect transistor (JFET), a metal-insulator semiconductor field effect transistor (MISFET), and a metal-semiconductor field effect transistor (MESFET).

### Claim 6 (depends on 1)

The optically controlled FET of claim 1, wherein the FET comprises a n-channel metal oxide semiconductor field effect transistor (MOSFET).

### Claim 7 (depends on 6)

The optically controlled FET of claim 6, wherein the n-channel MOSFET further comprises a p+ region disposed between the n+ source region and the gate of the MOSFET.

### Claim 8 (depends on 7)

The optically controlled FET of claim 7, wherein the n-channel MOSFET further comprises an ohmic contact providing electrical connection between the p+ region and the gate of the FET.

### Claim 9 (depends on 7)

The optically controlled FET of claim 7, wherein the photoconductive region further comprises:
a conductive upper region; and
an insulating semiconductor region configured to generate charge carriers in response to incident light and disposed upon the n+ source region.

### Claim 10 (depends on 9)

The optically controlled FET of claim 9, further comprising:
a highly-doped semiconductor region disposed between and in ohmic contact with the conductive upper region and insulating semiconductor region of the photoconductive region.

### Claim 11 (depends on 9)

The optically controlled FET of claim 9, wherein the highly-doped semiconductor region is further disposed between and in ohmic contact with the n+ source region.

### Claim 12 (depends on 9)

The optically controlled FET of claim 9, wherein the n-channel MOSFET further comprises an ohmic contact providing electrical connection between the p+ region and the gate of the FET.