# US 12,113,059 B2 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,113,059 B2 - Document ID: US12113059B2 - Status: Granted - Kind: B2 - Application number: 18/147,935 - Filed: 2022-12-29 - Published: 2024-01-18 - Granted: 2024-10-08 - Earliest claimed: 2022-07-12 - Assignees: Diodes Incorporated - Applicants: Diodes Incorporated - Inventors: Michael Fogarty Cahir; Stephen Geoffrey Badcock - Web page: https://patentgrep.com/patent/US12113059B2 ## CPC - H10D 89/711: {using bipolar transistors as protective elements} - H10D 8/00: Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00) - H10D 8/021: {of breakdown diodes} - H10D 8/041: {of multilayer diodes} - H10D 62/60: Impurity distributions or concentrations - H10D 8/422: {PN diodes having the PN junctions in mesas} - H10D 62/115: {Dielectric isolations, e.g. air gaps} - H10D 62/126: {Top-view geometrical layouts of the regions or the junctions} - H10D 89/60: Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract There is provided a semiconductor device and a method of manufacturing the same. The method comprises: depositing an epitaxial layer on a semiconductor substrate, wherein the semiconductor substrate is of a first conductivity type, and the epitaxial layer is of a second conductivity type that is opposite to the first conductivity type, wherein depositing the epitaxial layer comprises depositing a first epi-layer of a first doping concentration, a second epi-layer of a second doping concentration and a third epi-layer of a third doping concentration, and wherein the semiconductor substrate and the first epi-layer form a first P-N junction at their interface, and the second epi-layer is arranged between the first and third epi-layers and the second doping concentration is higher than each of the first doping concentration and the third doping concentration; and forming a doped region of the first conductivity type at a surface of the third epi-layer, such that the doped region 8 and the third epi-layer form a second P-N junction at their interface. ## Claims ### Claim 1 A method of manufacturing a semiconductor device, comprising: depositing an epitaxial layer on a semiconductor substrate, wherein the semiconductor substrate is of a first conductivity type N, and the epitaxial layer is of a second conductivity type P that is opposite to the first conductivity type, wherein depositing the epitaxial layer comprises depositing a first epi-layer of a first doping concentration, a second epi-layer of a second doping concentration and a third epi-layer of a third doping concentration, and wherein: the semiconductor substrate and the first epi-layer form a first P-N junction at their interface; the second epi-layer is arranged between the first and third epi-layers; and the second doping concentration is higher than each of the first doping concentration and the third doping concentration; forming a first doped region of the first conductivity type N at a surface of the third epi-layer, such that the first doped region and the third epi-layer form a second P-N junction at their interface, wherein the semiconductor substrate, the epitaxial layer and the first doped region form a vertical bipolar junction transistor; and forming a second doped region of the second conductivity type P at the surface of the third epi-layer, wherein the second doped region is surrounded by the first doped region, and a base of the vertical bipolar junction transistor is shorted to the second doped region. ### Claim 2 (depends on 1) The method of claim 1, further comprising: selectively etching the epitaxial layer and the semiconductor substrate to form a trench extending through the epitaxial layer into the semiconductor substrate. ### Claim 3 (depends on 2) The method of claim 2, wherein the trench is of a tubular shape. ### Claim 4 (depends on 2) The method of claim 2, further comprising filling the trench with an electrically insulating material. ### Claim 5 (depends on 2) The method of claim 2, wherein the first doped region is separate from the trench without contacting the trench. ### Claim 6 (depends on 1) The method of claim 1, further comprising: forming a first electrode electrically connected to the first doped region and the second doped region, and a second electrode electrically connected to the semiconductor substrate. ### Claim 7 (depends on 1) The method of claim 1, wherein the first doped region occupies less area than the third epi-layer along a plane that is parallel to a surface of the semiconductor substrate. ### Claim 8 (depends on 1) The method of claim 1, wherein the second doped region, the epitaxial layer and the semiconductor substrate form a diode. ### Claim 9 (depends on 1) The method of claim 1, wherein the second doped region has a higher doping concentration than the third epi-layer. ### Claim 10 (depends on 1) The method of claim 1, wherein the semiconductor device is an electrostatic discharge (ESD) protection device. ### Claim 11 A semiconductor device, comprising: a semiconductor substrate of a first conductivity type N; an epitaxial layer arranged on the semiconductor substrate, wherein: the epitaxial layer is of a second conductivity type P that is opposite to the first conductivity type N; the epitaxial layer comprises a first epi-layer of a first doping concentration, a second epi-layer of a second doping concentration and a third epi-layer of a third doping concentration, with the semiconductor substrate and the first epi-layer forming a first P-N junction at their interface; and the second epi-layer is arranged between the first and third epi-layers and the second doping concentration is higher than each of the first doping concentration and the third doping concentration; a first doped region arranged at a surface of the third epi-layer, wherein the first doped region is of the first conductivity type N such that the first doped region and the third epi-layer form a second P-N junction at their interface, and wherein the semiconductor substrate, the epitaxial layer and the first doped region form a vertical bipolar junction transistor; and a second doped region of the second conductivity type P arranged at the surface of the third epi-layer, wherein the second doped region is surrounded by the first doped region, and a base of the vertical bipolar junction transistor is shorted to the second doped region. ### Claim 12 (depends on 11) The semiconductor device of claim 11, wherein the semiconductor device is an electrostatic discharge (ESD) protection device. ### Claim 13 (depends on 11) The semiconductor device of claim 11, further comprising: a trench extending through the epitaxial layer into the semiconductor substrate. ### Claim 14 (depends on 13) The semiconductor device of claim 13, wherein the trench is of a tubular shape. ### Claim 15 (depends on 13) The semiconductor device of claim 13, wherein the trench is filled with an electrically insulating material. ### Claim 16 (depends on 13) The semiconductor device of claim 13, wherein the first doped region is separate from the trench without contacting the trench. ### Claim 17 (depends on 13) The semiconductor device of claim 13, wherein the semiconductor device is an electrostatic discharge (ESD) protection device. ### Claim 18 (depends on 11) The semiconductor device of claim 11, further comprising: a first electrode electrically connected to the first doped region and the second doped region; and a second electrode electrically connected to the semiconductor substrate. ### Claim 19 (depends on 11) The semiconductor device of claim 11, wherein the second doped region, the epitaxial layer and the semiconductor substrate form a diode. ### Claim 20 (depends on 11) The semiconductor device of claim 11, wherein the second doped region has a higher doping concentration than the third epi-layer.