# US 12,113,029 B2 · Semiconductor device and manufacturing method thereof

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- Number: US 12,113,029 B2
- Document ID: US12113029B2
- Status: Granted
- Kind: B2
- Application number: 17/434,589
- Filed: 2019-04-05
- Published: 2022-05-05
- Granted: 2024-10-08
- Earliest claimed: 2019-04-05
- Assignees: Mitsubishi Electric Corporation
- Applicants: Mitsubishi Electric Corporation
- Inventors: Tatsuto Nishihara
- Web page: https://patentgrep.com/patent/US12113029B2

## CPC

- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- B29C 45/14655: {connected to or mounted on a carrier, e.g. lead frame}
- H10W 42/265: {Shielding wires, e.g. constant potential wires}
- H10W 42/284: {shielding resins}
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 74/016: {using moulds}
- H10W 74/114: {by a substrate and the encapsulations}
- H10W 74/121: {by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation}
- H10W 74/473: {containing a filler}
- H10W 70/635: {Through-vias}
- H10W 70/656: Fan-in layouts
- H10W 72/073: {of die-attach connectors}
- H10W 72/07336: {Soldering or alloying}
- H10W 72/07337: {using a polymer adhesive, e.g. an adhesive based on silicone or epoxy}
- H10W 72/075: {of bond wires}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 72/5449: {not being orthogonal to a side surface of the chip, e.g. fan-out arrangements}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- B29C: SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING (making preforms B29B11/00; making laminated products by combining previously unconnected layers which become one product whose layers will remain together B32B37/00 - B32B41/00)

## Abstract

A first molded resin containing first insulating fillers having particle sizes smaller than the opening size of a wire mesh is formed inside the wire mesh to seal a semiconductor chip, bonding wires, and bond pads, and a second molded resin containing second insulating fillers having particle sizes larger than the opening size of the wire mesh is formed outside the wire mesh to seal the semiconductor ship, the bonding wires, and the bond pads via the first molded resin and the wire mesh. This allows for reducing warpage during solder mounting and for improving productivity.

## Claims

### Claim 1

A semiconductor device comprising:
a semiconductor chip bonded to a surface of a substrate;
bonding wires connecting the semiconductor chip to bond pads formed on the surface of the substrate;
a grounded pad formed so as to surround the semiconductor chip and the bond pads;
a basket-shaped wire mesh covering the semiconductor chip, the bonding wires, and the bond pads and joined to the grounded pad;
a first molded resin containing first fillers having particle sizes smaller than an opening size of the wire mesh and sealing, inside of the wire mesh, the semiconductor chip, the bonding wires, and the bond pads; and
a second molded resin containing second fillers having particle sizes larger than the opening size of the wire mesh and sealing, outside the wire mesh and via the first molded resin and the wire mesh, the semiconductor chip, the bonding wires, and the bond pads.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the first fillers and the second fillers are insulating fillers.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the first fillers are the insulating fillers and the second fillers contain conductive fillers.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the second fillers are conductive fibrous fillers.

### Claim 5 (depends on 3)

The semiconductor device of claim 3, wherein the wire mesh have a flange part.

### Claim 6 (depends on 4)

The semiconductor device of claim 4, wherein the wire mesh have a flange part.