# US 12,113,016 B2 · Semiconductor package having smart power stage and E-fuse solution

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- Number: US 12,113,016 B2
- Document ID: US12113016B2
- Status: Granted
- Kind: B2
- Application number: 18/242,460
- Filed: 2023-09-05
- Published: 2023-12-28
- Granted: 2024-10-08
- Earliest claimed: 2020-12-28
- Assignees: Alpha and Omega Semiconductor International LP
- Applicants: Alpha and Omega Semiconductor International LP
- Inventors: Prabal Upadhyaya
- Web page: https://patentgrep.com/patent/US12113016B2

## CPC

- H10W 20/493: {Fuses, i.e. interconnections changeable from conductive to non-conductive}
- H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M 1/32: Means for protecting converters other than automatic disconnection
- H02M 1/327: {against abnormal temperatures}
- H02M 3/1582: {Buck-boost converters (H02M3/1584 takes precedence)}
- H10D 84/83: of only insulated-gate FETs [IGFET]
- H10W 42/80: protecting against overcurrent or overload, e.g. fuses or shunts (integrated devices comprising arrangements for electrical protection H10D89/60)
- H10W 70/411: {Chip-supporting parts, e.g. die pads}
- H10W 70/466: {Tape carriers or flat leads}
- H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00}
- H10W 72/00: Interconnections or connectors in packages
- H10W 74/10: characterised by their shape or disposition
- H10W 90/811: {Multiple chips on leadframes}
- H02M 3/003: {Constructional details, e.g. physical layout, assembly, wiring or busbar connections}
- H02M 3/158: including plural semiconductor devices as final control devices for a single load
- H10W 72/871: {Bond wires and strap connectors}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/926: {Multiple bond pads having different sizes}
- H10W 74/111: {the semiconductor body being completely enclosed}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/763: {between laterally-adjacent chips}
- H10W 90/766: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor package comprises a lead frame, a low side metal-oxide-semiconductor field-effect transistor (MOSFET), an E-fuse MOSFET, a high side MOSFET, a metal connection, a gate driver, an E-fuse IC, and a molding encapsulation. A buck converter comprises a smart power stage (SPS) network and an E-fuse solution network. The SPS network comprises a high side switch, a low side switch, and a gate driver. A drain of the low side switch is coupled to a source of the high side switch via a switch node. The gate driver is coupled to a gate of the high side switch and a gate of the low side switch. The E-fuse solution network comprises a sense resistor, an E-fuse switch, an E-fuse integrated circuit (IC), and an SD circuit.

## Claims

### Claim 1

A buck converter comprising
a smart power stage (SPS) network comprising
a high side switch;
a low side switch, a drain of the low side switch being coupled to a source of the high side switch via a switch node; and
a gate driver coupled to a gate of the high side switch and a gate of the low side switch; and
an E-fuse solution network comprising
an E-fuse switch, a source of the E-fuse switch coupled to a drain of the high side switch;
an E-fuse integrated circuit (IC) comprising
a comparator comprising
a reference input;
a functional input coupled to a short detection (SD) node; and
an output; and
an SD circuit coupled to the SD node of the E-fuse IC, the SD circuit comprising
a first circuit resistor, a first node of the first circuit resistor being coupled to the switch node;
a second circuit resistor;
a circuit capacitor; and
a circuit diode.

### Claim 2 (depends on 1)

The buck converter of claim 1, wherein the low side switch is a first metal-oxide-semiconductor field-effect transistor (MOSFET);
wherein the high side switch is a second MOSFET; and
wherein a size of the first MOSFET is larger than a size of the second MOSFET so that the high side switch has lower peak current handling capacity than the low side switch.

### Claim 3 (depends on 2)

The buck converter of claim 2, wherein the E-fuse IC further comprises an integrated current sense amplifier measuring current through the high side switch; and
wherein the E-fuse IC turns off the E-fuse switch when the current through the high side switch is larger than a pre-determined value.

### Claim 4 (depends on 3)

The buck converter of claim 3, wherein the E-fuse IC monitors an on resistance of the E-Fuse switch to estimate current through the high side switch.

### Claim 5 (depends on 3)

The buck converter of claim 3, wherein the E-fuse solution network further comprising a sense resistor and the current sense amplifier detects a voltage drop across the sense resistor to measure the current through the high side switch.

### Claim 6 (depends on 3)

The buck converter of claim 3, wherein the E-fuse switch comprises a trench MOSFET with a second mirror FET integrated as common drain MOSFETs.

### Claim 7 (depends on 3)

The buck converter of claim 3, wherein the current through the high side switch increases when the high side switch is short and the gate driver continues to drive the low side switch.

### Claim 8 (depends on 1)

The buck converter of claim 1, wherein the SD circuit measures a time duration when the switch node stays high;
wherein a value of the functional input corresponds to the time duration when the switch node stays high;
wherein the output of the comparator flags a fault signal when the value of the functional input is larger than a value of the reference input.

### Claim 9 (depends on 8)

The buck converter of claim 8, wherein the time duration increases when the high side switch is short and the low side switch is not turned on.