# US 12,112,976 B2 · Pseudo-substrate with improved efficiency of usage of single crystal material

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- Number: US 12,112,976 B2
- Document ID: US12112976B2
- Status: Granted
- Kind: B2
- Application number: 17/088,426
- Filed: 2020-11-03
- Published: 2021-02-18
- Granted: 2024-10-08
- Earliest claimed: 2012-09-04
- Assignees: Soitec
- Applicants: Soitec
- Inventors: Fabrice Letertre; Oleg Kononchuk
- Web page: https://patentgrep.com/patent/US12112976B2

## CPC

- H10P 90/1914: {using bonding}
- B32B 7/12: using interposed adhesives or interposed materials with bonding properties
- B32B 9/04: comprising such {particular} substance as the main or only constituent of a layer, {which is} next to another layer of {the same or of} a {different material (next to a glass layer B32B17/06; layered products with at least two ceramic layers composed mainly of ceramic B32B18/00)}
- C30B 29/68: Crystals with laminate structure, e.g. "superlattices"
- C30B 33/00: After-treatment of single crystals or homogeneous polycrystalline material with defined structure (C30B31/00 takes precedence)
- C30B 33/06: Joining of crystals
- H10D 86/201: {the substrates comprising an insulating layer on a semiconductor body, e.g. SOI (H10D86/40 take precedence)}
- H10P 10/12: {Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates (preparing SOI wafers using bonding H10P90/1914)}
- H10P 90/00: Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10W 10/181: {Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers}
- B32B 2457/14: Semiconductor wafers
- H10H 20/018: {Bonding of wafers}
- Y10T 156/1062: Prior to assembly
- Y10T 428/24942: including components having same physical characteristic in differing degree
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- B32B: LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- C30B: SINGLE-CRYSTAL GROWTH (by using ultra-high pressure, e.g. for the formation of diamonds, B01J3/06); UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL (zone-refining of metals or alloys C22B); PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (casting of metals, casting of other substances by the same processes or devices B22D; working of plastics B29; modifying the physical structure of metals or alloys C21D, C22F); SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (for producing semiconductor devices or parts thereof H10); APPARATUS THEREFOR
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

The invention relates to a method for fabricating a pseudo-substrate comprising the steps of providing a single crystal ingot, providing a handle substrate, cutting a thin slice from the single crystal ingot, and attaching the thin slice to the handle substrate to form a pseudo-substrate. According to the invention, the thickness of the thin slice is substantially equal or inferior to a critical thickness below which the slice, if taken alone, is no longer mechanically stable. The invention further relates to a semiconductor structure.

## Claims

### Claim 1

A method for fabricating at least one pseudo-substrate, comprising:
cutting a thin piezoelectric layer from a single crystal ingot comprising a piezoelectric material, to provide the thin piezoelectric layer comprising a first rough cut surface and a second surface opposite to the first rough cut surface of the single crystal ingot comprising a rough cut surface;
providing a bonding layer on the first rough cut surface of the thin piezoelectric layer without polishing the first rough cut surface of the thin piezoelectric layer, the bonding layer comprising a front surface and a back surface, the front surface of the bonding layer adhering to the first rough cut surface of the thin piezoelectric layer; and
bonding the back surface of the bonding layer to a handle substrate without polishing the back surface of the bonding layer prior to the bonding,
wherein the handle substrate has a matching coefficient of thermal expansion with respect to the thin piezoelectric layer, and
wherein a thickness of the thin piezoelectric layer is 300 μm or less.

### Claim 2 (depends on 1)

The method of claim 1, wherein the piezoelectric material comprises LiNbO3 or LiTaO3.

### Claim 3 (depends on 1)

The method of claim 1, wherein providing the bonding layer on the first rough cut surface of the thin piezoelectric layer comprises applying a ceramic-based adhesive, or a graphite-based adhesive, or both, on the first rough cut surface of the thin piezoelectric layer.

### Claim 4 (depends on 3)

The method of claim 3, wherein cutting the thin piezoelectric layer from the single crystal ingot comprises sawing the thin piezoelectric layer from the single crystal ingot.

### Claim 5 (depends on 1)

The method of claim 1, wherein providing the bonding layer on the first rough cut surface of the thin piezoelectric layer comprises applying an adhesive having a matching coefficient of thermal expansion with respect to the thin piezoelectric layer, on the first rough cut surface of the thin piezoelectric layer.

### Claim 6 (depends on 1)

The method of claim 1, wherein the handle substrate comprises a silicon substrate.

### Claim 7 (depends on 1)

The method of claim 1, further comprising at least one of:
polishing a second surface of the thin piezoelectric layer on the pseudo-substrate, the second surface of the thin piezoelectric layer being opposite to the first rough cut surface of the thin piezoelectric layer;
chamfering an edge of the pseudo-substrate; and
forming a flat or a notch on the pseudo-substrate.

### Claim 8 (depends on 1)

The method of claim 1, wherein
providing the bonding layer on the first rough cut surface of the thin piezoelectric layer comprises providing an oxide layer on the first rough cut surface of the thin piezoelectric layer, and
bonding the back surface of the bonding layer to the handle substrate comprises molecularly bonding the back surface of the oxide layer to the handle substrate.

### Claim 9 (depends on 1)

The method of claim 1, wherein bonding the back surface of the bonding layer to the handle substrate comprises applying an adhesive layer to the handle substrate prior to the bonding.

### Claim 10 (depends on 1)

The method of claim 1, further comprising, after fabricating the at least one pseudo-substrate, fabricating a second pseudo-substrate by:
providing another bonding layer on a rough surface of the remainder of the single crystal ingot without polishing the rough surface of the remainder of the single crystal ingot, the another bonding layer comprising another front surface and another back surface, the another front surface of the bonding layer adhering to the rough surface of the remainder of the single crystal ingot; and
bonding the back surface of the another bonding layer to another handle substrate without polishing the back surface of the another bonding layer prior to the bonding,
wherein a thickness of another thin piezoelectric layer is 300 μm or less.

### Claim 11

A method for fabricating a structure comprising a layer of piezoelectric material on a final substrate, the method comprising:
providing a pseudo-substrate, including:
cutting a thin piezoelectric layer from a single crystal ingot comprising a piezoelectric material, the thin piezoelectric layer comprising a first rough surface;
providing a bonding layer on the first rough surface of the thin piezoelectric layer without polishing the first rough surface of the thin piezoelectric layer, the bonding layer comprising a front surface and a back surface, the front surface of the bonding layer adhering to the first rough surface of the thin piezoelectric layer; and
bonding the back surface of the bonding layer to a handle substrate without polishing the back surface of the bonding layer prior to the bonding;
bonding the piezoelectric layer of the pseudo-substrate to the final substrate; and
removing the handle substrate of the pseudo-substrate from the piezoelectric layer after bonding the piezoelectric layer of the pseudo-substrate to the final substrate.

### Claim 12 (depends on 11)

The method of claim 11,
wherein a thickness of the piezoelectric layer is 300 μm or less.

### Claim 13 (depends on 12)

The method of claim 12, wherein bonding the piezoelectric layer of the pseudo-substrate to the final substrate comprises:
providing an oxide layer on at least one of a free surface of the final substrate and the piezoelectric layer of the pseudo-substrate; and
molecularly bonding the piezoelectric layer of the pseudo-substrate to the final substrate with the oxide layer therebetween.

### Claim 14 (depends on 12)

The method of claim 12, wherein providing the bonding layer on the first rough surface of the thin piezoelectric layer comprises applying a ceramic-based adhesive, or a graphite-based adhesive, or both, on the first rough surface of the thin piezoelectric layer.

### Claim 15 (depends on 14)

The method of claim 14, wherein cutting the piezoelectric layer from the single crystal ingot comprises sawing the piezoelectric layer from the single crystal ingot.

### Claim 16 (depends on 12)

The method of claim 12, wherein bonding the back surface of the bonding layer to the handle substrate comprises bonding the back surface of the bonding layer to a handle substrate having a matching coefficient of thermal expansion with respect to the thin piezoelectric layer.

### Claim 17 (depends on 12)

The method of claim 12, wherein providing the bonding layer on the first rough surface of the thin piezoelectric layer comprises forming an oxide layer on the first rough surface of the thin piezoelectric layer, and wherein bonding the back surface of the bonding layer to the handle substrate comprises molecularly bonding the back surface of the oxide layer to the handle substrate.

### Claim 18 (depends on 12)

The method of claim 12, wherein providing the bonding layer on the first rough surface of the thin piezoelectric layer comprises providing an adhesive layer having a matching coefficient of thermal expansion with respect to the thin piezoelectric layer on the surface of the thin piezoelectric layer.

### Claim 19 (depends on 11)

The method of claim 11, further comprising fabricating a semiconductor device in or on the pseudo-substrate prior to bonding the piezoelectric layer of the pseudo-substrate to the final substrate.

### Claim 20 (depends on 19)

The method of claim 19, wherein the semiconductor device comprises at least one device selected from among the group consisting of an electronic device, an optoelectronic device, a hyper frequency device, a micro-electro-mechanical system (MEMS) device, and a micro-opto-electro-mechanical system (MOEMS) device.

### Claim 21 (depends on 11)

The method of claim 11, wherein removing the handle substrate of the pseudo-substrate from the piezoelectric layer comprises in-depth weakening of the pseudo-substrate by ion implantation, and splitting of the pseudo-substrate.

### Claim 22 (depends on 11)

The method of claim 11, wherein the handle substrate comprises a silicon substrate.

### Claim 23 (depends on 11)

The method of claim 11, wherein the piezoelectric material comprises LiNbO3 or LiTaO3.