# US 12,112,790 B2 · Method for determining target locking time of delay locked loop of memory apparatus

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- Number: US 12,112,790 B2
- Document ID: US12112790B2
- Status: Granted
- Kind: B2
- Application number: 17/847,031
- Filed: 2022-06-22
- Published: 2023-12-28
- Granted: 2024-10-08
- Earliest claimed: 2022-06-22
- Assignees: Nanya Technology Corporation
- Applicants: Nanya Technology Corporation
- Inventors: Shu-Wei Yang
- Web page: https://patentgrep.com/patent/US12112790B2

## CPC

- G11C 7/222: {Clock generating, synchronizing or distributing circuits within memory device}
- G11C 11/4076: Timing circuits (for regeneration management G11C11/406)
- G11C 29/023: {in clock generator or timing circuitry}
- H03L 7/0816: {the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input}
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B)

## Abstract

A method for determining a target locking time for a delay locked loop of a memory apparatus are provided. The method includes, a system inputting a first set of input signals to the memory apparatus in accordance with a first set of first operational parameters and a set of second operational parameters, the system measuring a first set of output signals from the memory apparatus in response to the first set of input signals to determine whether the delay locked loop fails at any combination of the first set of first operational parameters and the set of second operational parameters, the system determining a first candidate operational parameter from the first set of first operational parameters under which the delay locked loop does not fail for each of the set of second operational parameters, and the system determining the target locking time based on the first candidate operational parameter.

## Claims

### Claim 1

A method for determining a target locking time for a delay locked loop of a memory apparatus, the method comprising:
inputting, by a system, a first set of input signals to the memory apparatus in accordance with a first set of first operational parameters associated with locking times of the memory apparatus referring to time intervals to achieve a stable locking state from an initial state of the delay locked loop and a set of second operational parameters associated with clock periods of the memory apparatus;
receiving and measuring, by the system, a first set of output signals from the memory apparatus in response to the first set of input signals, and to determine whether the delay locked loop of the memory apparatus is in a first mode that the delay locked loop fails at any combination of the first set of first operational parameters and the set of second operational parameters, or in a second mode that the delay locked loop does not fail at any combination of the first set of first operational parameters and the set of second operational parameters;
determining, by the system, a first candidate operational parameter from the first set of first operational parameters under which the delay locked loop of the memory apparatus is at the second mode and does not fail for each of the set of second operational parameters; and
selecting, by the system, the first candidate operational parameter to determine the target locking time for the delay locked loop.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
inputting, by the system, a second set of input signals to the memory apparatus in accordance with a second set of first operational parameters and a set of third operational parameters, wherein the third operational parameters are different from the second operational parameters;
measuring, by the system, a second set of output signals from the memory apparatus to determine whether the delay locked loop of the memory apparatus fails at any combination of the second set of first operational parameters and the set of third operational parameters;
determining, by the system, a second candidate operational parameter of the second set of first operational parameters under which the delay locked loop of the memory apparatus does not fail for each of the set of third operational parameters; and
determining, by the system, the target locking time based on the first candidate operational parameter and the second candidate operational parameter.

### Claim 3 (depends on 1)

The method of claim 1, further comprising:
displaying, by the system, a first two-dimensional plot region comprising a plurality of plot units each corresponding to one combination of the first set of first operational parameters and the set of second operational parameters,
wherein a plot unit of the plurality of plot units shows a first color when the delay locked loop of the memory apparatus does not fail under the corresponding combination of the plot unit, and wherein the plot unit of the plurality of plot units shows a second color when the delay locked loop of the memory apparatus fails under the corresponding combination of the plot unit.

### Claim 4 (depends on 2)

The method of claim 2, further comprising:
displaying, by the system, a second two-dimensional plot region comprising a plurality of plot units each corresponding to one combination of the second set of first operational parameters and the set of third operational parameters,
wherein a plot unit of the plurality of plot units shows a first color when the delay locked loop of the memory apparatus does not fail under the corresponding combination of the plot unit, and wherein the plot unit of the plurality of plot units shows a second color when the delay locked loop of the memory apparatus fails under the corresponding combination of the plot unit.

### Claim 5 (depends on 3)

The method of claim 3, further comprising:
determining the first candidate operational parameter based on a distribution of the first color and the second color on the first two-dimensional plot region.