# US 12,112,788 B2 · Host apparatus and extension device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,112,788 B2 - Document ID: US12112788B2 - Status: Granted - Kind: B2 - Application number: 18/165,565 - Filed: 2023-02-07 - Published: 2023-06-15 - Granted: 2024-10-08 - Earliest claimed: 2016-03-16 - Assignees: Kioxia Corporation - Applicants: Kioxia Corporation - Inventors: Akihisa Fujimoto - Web page: https://patentgrep.com/patent/US12112788B2 ## CPC - G06F 1/266: {Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips} - G11C 11/4074: Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits - G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C) - G06F 1/28: Supervision thereof, e.g. detecting power-supply failure by out of limits supervision - G06F 13/4022: {using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence)} - G06F 13/4081: {Live connection to bus, e.g. hot-plugging (current or voltage limitation during live insertion H02H9/004)} - G06F 13/4204: {on a parallel bus} - G11C 7/222: {Clock generating, synchronizing or distributing circuits within memory device} - G11C 11/409: Read-write [R-W] circuits - G11C 29/023: {in clock generator or timing circuitry} - G11C 29/50004: {of threshold voltage} - G11C 5/14: Power supply arrangements {, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels} - G11C 5/144: {Detection of predetermined disconnection or reduction of power supply, e.g. power down or power standby} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract According to one embodiment, a first power-supply voltage is applied to I/O cells, an I/O cell connected to a clock terminal is initially set to a threshold of a second voltage signaling, an I/O cell connected to a command terminal and I/O cells connected to data terminals are initially set as an input, and when a clock control unit detects receipt of one clock pulse and a signal voltage control unit detects a host using the second voltage signaling, a signal voltage control unit drives the I/O cell of a first data terminal high level after a second power-supply voltage is applied to I/O cells and the threshold of a second voltage signaling is set to I/O cells of the clock, command and data terminals. ## Claims ### Claim 1 A host apparatus configured to supply a power-supply voltage to a device and communicate with the device via signals of a clock, a command/response, and data, a first voltage signaling and a second voltage signaling lower than the first voltage signaling being usable for the communication as input/output signal levels of the signals, comprising: a power/ground terminal configured to supply the power-supply voltage to the device; a clock terminal configured to output the clock; a command terminal configured to transmit the command and receive the response; a plurality of data terminals including a 1st data terminal to a 4th data terminal, each being configured to perform input and output of the data; an I/O cell unit connected to the clock terminal, the command terminal, and the data terminals; and a device detection unit configured to detect whether the device is communicable under the second voltage signaling, wherein the host apparatus performs an initial setting where the host apparatus sets each of the clock terminal, the command terminal, the 1st data terminal, the 2nd data terminal, and the 4th data terminal to a Low level, and where the host apparatus sets the 3rd data terminal to the Low level or pulls down the 3rd data terminal via a resistor under the second voltage signaling, the host apparatus supplies the power-supply voltage via the power/ground terminal to the device, the device detection unit outputs one clock pulse to the clock terminal after passage of a first certain period of time from a start of supplying the power-supply voltage, the host apparatus determines the device as a LVS (Low Voltage Signaling) device when signal level of the 3rd data terminal has been inverted after passage of a second certain period of time from providing the one clock pulse. ### Claim 2 (depends on 1) The host apparatus of claim 1, wherein when determining the device as the LVS device, the host apparatus sets each of the 1st data terminal, the 2nd data terminal, and 4th data terminal to a High level or pulls up each of the 1st data terminal, the 2nd data terminal, and 4th data terminal so as to perform, an initialization process of the device. ### Claim 3 (depends on 2) The host apparatus of claim 2, wherein in the initialization process, the host apparatus outputs a clock to make the device stop driving of the 3rd data terminal. ### Claim 4 (depends on 3) The host apparatus of claim 3, after making the device stop driving of the 3rd data terminal in the initialization process, the host apparatus pulls up the 3rd data terminal, outputs predetermined numbers of clocks with the second voltage signaling to the device, and issues a first command and a second command. ### Claim 5 (depends on 4) The host apparatus of claim 4, wherein the host apparatus makes the device power off when no response to the second command is received from the device. ### Claim 6 (depends on 1) The host apparatus of claim 1, wherein a High-level period of the one clock is longer than a pre-determined value. ### Claim 7 (depends on 1) The host apparatus of claim 1, wherein the host apparatus determines the device as a HVS (High Voltage Signaling) device when signal level of the 3rd data terminal accords with a level set by the host apparatus after passage of the second certain period of time from providing the one clock pulse. ### Claim 8 (depends on 7) The host apparatus of claim 7, wherein when determining the device as the HVS device, the host apparatus stops pulling up of the 3rd data terminal and stops supplying the power-supply voltage to the device. ### Claim 9 (depends on 8) The host apparatus of claim 8, wherein after the stop of supplying the power-supply voltage to the device, the host apparatus stops driving of the 1st data terminal, the 2nd data terminal, and the 4th data terminal. ### Claim 10 (depends on 1) The host apparatus of claim 1, wherein in the initial setting, the host apparatus pulls down the 3rd data terminal via the resistor under the second voltage signaling. ### Claim 11 (depends on 1) The host apparatus of claim 1, further comprising a power switch, wherein the host apparatus turns on the power switch for the power-supply voltage to be supplied from the host apparatus to the device.