# US 12,112,719 B2 · Electronic device and modulating device with short frame time length > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,112,719 B2 - Document ID: US12112719B2 - Status: Granted - Kind: B2 - Application number: 18/167,902 - Filed: 2023-02-13 - Published: 2023-09-07 - Granted: 2024-10-08 - Earliest claimed: 2022-03-04 - Assignees: Innolux Corporation - Applicants: Innolux Corporation - Inventors: Yi-Hung Lin; Cheng-Hung Tsai - Web page: https://patentgrep.com/patent/US12112719B2 ## CPC - G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} - G09G 5/006: {Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04)} - G09G 2300/0408: Integration of the drivers onto the display substrate - G09G 2300/0426: Layout of electrodes and connections - G09G 2310/0202: Addressing of scan or signal lines - G09G 2310/021: Double addressing, i.e. scanning two or more lines, e.g. lines 2 and 3; 4 and 5, at a time in a first field, followed by scanning two or more lines in another combination, e.g. lines 1 and 2; 3 and 4, in a second field - G09G 2310/0218: with collection of electrodes in groups for n-dimensional addressing - G09G 2310/0243: Details of the generation of driving signals - G09G 2310/0264: Details of driving circuits - G09G 2310/0281: Arrangement of scan or data electrode driver circuits at the periphery of a panel not inherent to a split matrix structure - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract An electronic device with short frame time length is provided. The electronic device includes a substrate, a plurality of first signal lines, a plurality of second signal lines, and two first integrated circuits. The plurality of first signal lines are disposed on the substrate. The plurality of first signal lines are divided into a first group of signal lines and a second group of signal lines. The plurality of second signal lines are disposed on the substrate. The plurality of second signal lines are disposed alternately with the plurality of first signal lines. The two first integrated circuits are bonded on the substrate. Each of the two first integrated circuits are electrically connected to the first group of signal lines and the second group of signal lines. The first group of signal lines and the second group of signal lines are disposed alternately in columns. ## Claims ### Claim 1 An electronic device, comprising: a substrate; a plurality of first signal lines disposed on the substrate and divided into a first group of signal lines and a second group of signal lines, wherein the plurality of first signal lines are respectively extending along a first direction; a plurality of second signal lines disposed on the substrate, wherein the plurality of second signal lines are respectively extending along a second direction and the first direction is perpendicular to the second direction; two first integrated circuits bonded on the substrate and each electrically connected to respective one of the first group of signal lines and the second group of signal lines, wherein the first group of signal lines and the second group of signal lines are disposed alternately in columns, wherein one of the first integrated circuits provides a first data signal group to the first group of signal lines for a first time length; and a second integrated circuit bonded on the substrate and electrically connected to the plurality of second signal lines, wherein the second integrated circuit provides a scan signal to one of the plurality of second signal lines for a second time length, wherein the second time length is shorter than the first time length, and wherein one of the first integrated circuits provides the first data signal group to the first group of signal lines during a first time interval, the other of the first integrated circuits provides second data signal group to the second group of signal lines during a second time interval, and the first time interval overlaps at least partially with the second time interval. ### Claim 2 (depends on 1) The electronic device of claim 1, wherein: the plurality of first signal lines are one of data lines and scan lines, and the plurality of second signal lines are the other one of the data lines and the scan lines. ### Claim 3 (depends on 1) The electronic device of claim 1, wherein the two first integrated circuits are one of a gate driving integrated circuit and a data driving integrated circuit. ### Claim 4 (depends on 3) The electronic device of claim 3, wherein the gate driving integrated circuit comprises a level shifter circuit, a shift register circuit, and a timing shifter circuit. ### Claim 5 (depends on 1) The electronic device of claim 1, further comprising: another second integrated circuit bonded on the substrate, wherein the plurality of second signal lines are divided into a third group of signal lines and a fourth group of signal lines, wherein the second integrated circuit and the another second integrated circuit are each electrically connected to respective one of the third group of signal lines and the fourth group of signal lines, and wherein the third group of signal lines and the fourth group of signal lines are disposed alternately in rows. ### Claim 6 (depends on 5) The electronic device of claim 5, wherein: the two first integrated circuits are disposed along a first side of the substrate, and the two second integrated circuits are disposed along at least one side of the substrate different from the first side. ### Claim 7 (depends on 5) The electronic device of claim 5, wherein the two first integrated circuits and the two second integrated circuits are disposed along a first side of the substrate. ### Claim 8 (depends on 5) The electronic device of claim 5, wherein the two first integrated circuits and the two second integrated circuits are respectively disposed along four different sides of the substrate. ### Claim 9 (depends on 5) The electronic device of claim 5, wherein a plurality of timings of a plurality of corresponding signals provided by the two second integrated circuits are identical to each other. ### Claim 10 (depends on 5) The electronic device of claim 5, wherein: the substrate comprises an active area and a peripheral area, the two first integrated circuits and the two second integrated circuits are respectively disposed at the peripheral area, and the electronic device further comprises a plurality of electrostatic discharge elements disposed in the peripheral area and surrounding the active area. ### Claim 11 A modulating device, comprising: a substrate; a modulating element; a plurality of first signal lines disposed on the substrate and divided into a first group of signal lines and a second group of signal lines, wherein one of the plurality of first signal lines is electrically connected to the modulating element, wherein the plurality of first signal lines are respectively extending along a first direction; a plurality of second signal lines disposed on the substrate, wherein the plurality of second signal lines are respectively extending along a second direction and the first direction is perpendicular to the second direction, wherein one of the plurality of second signal lines is electrically connected to the modulating element; two first integrated circuits bonded on the substrate and each electrically connected to respective one of the first group of signal lines and the second group of signal lines, wherein the first group of signal lines and the second group of signal lines are disposed alternately in columns, wherein one of the first integrated circuits provides a first data signal group to the first group of signal lines for a first time length; and a second integrated circuit bonded on the substrate and electrically connected to the plurality of second signal lines, wherein the second integrated circuit provides a scan signal to one of the plurality of second signal lines for a second time length; wherein the second time length is shorter than the first time length, and wherein one of the first integrated circuits provides the first data signal group to the first group of signal lines during a first time interval, the other of the first integrated circuits provides second data signal group to the second group of signal lines during a second time interval, and the first time interval overlaps at least partially with the second time interval. ### Claim 12 (depends on 11) The modulating device of claim 11, wherein the modulating element is a varactor. ### Claim 13 (depends on 11) The modulating device of claim 11, wherein: the plurality of first signal lines are one of data lines and scan lines, and the plurality of second signal lines are the other one of the data lines and the scan lines. ### Claim 14 (depends on 11) The modulating device of claim 11, wherein the two first integrated circuits are one of gate driving integrated circuits and a data driving integrated circuit. ### Claim 15 (depends on 14) The modulation device of claim 14, wherein the gate driving integrated circuit comprises a level shifter circuit, a shift register circuit, and a timing shifter circuit. ### Claim 16 (depends on 11) The modulating device of claim 11, further comprising: another second integrated circuit bonded on the substrate, wherein the plurality of second signal lines are divided into a third group of signal lines and a fourth group of signal lines, wherein the second integrated circuit and the another second integrated circuit are each electrically connected to respective one of the third group of signal lines and the fourth group of signal lines, and wherein the third group of signal lines and the fourth group of signal lines are disposed alternately in rows. ### Claim 17 (depends on 16) The modulating device of claim 16, wherein: the two first integrated circuits are disposed along a first side of the substrate, and the two second integrated circuits are disposed along at least one side of the substrate different from the first side. ### Claim 18 (depends on 16) The modulating device of claim 16, wherein the two first integrated circuits and the two second integrated circuits are disposed along a first side of the substrate. ### Claim 19 (depends on 16) The modulating device of claim 16, wherein the two first integrated circuits and the two second integrated circuits are respectively disposed along four different sides of the substrate. ### Claim 20 (depends on 16) The modulating device of claim 16, wherein: the substrate comprises an active area and a peripheral area, the two first integrated circuits and the two second integrated circuits are respectively disposed at the peripheral area, and the electronic device further comprises a plurality of electrostatic discharge elements disposed in the peripheral area and surrounding the active area.