# US 12,112,691 B2 · Display module including a display panel and driving circuit

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- Number: US 12,112,691 B2
- Document ID: US12112691B2
- Status: Granted
- Kind: B2
- Application number: 18/154,364
- Filed: 2023-01-13
- Published: 2023-06-08
- Granted: 2024-10-08
- Earliest claimed: 2020-09-17
- Assignees: Samsung Electronics Co., Ltd.; Research & Business Foundation Sungkyunkwan University
- Applicants: Samsung Electronics Co., Ltd.; Research & Business Foundation Sungkyunkwan University
- Inventors: Jinho Kim; Yong-Sang Kim; Donggun Oh; Eun Kyo Jung; Jungwoo Lee
- Web page: https://patentgrep.com/patent/US12112691B2

## CPC

- G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED]
- G09G 3/2003: {Display of colours (specific for liquid crystal displays G09G3/3607)}
- G09G 3/2014: {by modulation of the duration of a single pulse during which the logic level remains constant}
- G09G 3/2081: {with combination of amplitude modulation and time modulation (space and time error diffusion G09G3/2066)}
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2300/0852: being a dynamic memory with more than one capacitor
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2310/0259: with use of an analog or digital ramp generator in the column driver or in the pixel circuit
- G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
- G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit
- G09G 2310/066: Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/0223: Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
- G09G 2320/0238: Improving the black level
- G09G 2320/0633: by amplitude modulation of the brightness of the illumination source
- G09G 2330/021: Power management, e.g. power saving
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

A display module comprises: a display panel; and a driving unit configured to apply a first control signal for setting a PWM data voltage to sub-pixels, included in each row-line of the display panel for each image frame, to the sub-pixels in a row-line order, and apply a second control signal for controlling the light emission of sub-pixels, included in each row-line, to the sub-pixel in a row-line order, wherein the sub-pixels included in each row-line emit light for a time corresponding to the PWM data voltage set according to the first control signal, based on the second control signal applied to the light emission section corresponding to the image frame, and do not emit light for a preset time based on second control signal applied in a period between consecutive image frame periods.

## Claims

### Claim 1

A display module comprising:
a display panel comprising a plurality of pixels each including a plurality of sub-pixels are arranged in a matrix form; and
a driving circuit configured to:
apply a first control signal for setting a pulse width modulation (PWM) data voltage of the sub-pixels included in all the row-lines of the display panel in a row-line order for each image frame, and
apply a second control signal for controlling light emission of the sub-pixels included in all the row-lines thereof in the row-line order based on a start signal,
wherein the sub-pixels included in each row-line are configured to:
emit light for time corresponding to the PWM data voltage set based on the first control signal, based on the second control signal applied to the light emission section corresponding to the image frame, and
emit no light for a predetermined time based on the second control signal applied to a period between consecutive image frame periods.

### Claim 2 (depends on 1)

The display module as claimed in claim 1, further comprising a processor configured to detect a malfunction in the display panel based on power supplied to the display panel during the predetermined time.

### Claim 3 (depends on 1)

The display module as claimed in claim 1, wherein the driving circuit is further configured to apply the second control signal to the sub-pixels included in all the row-lines in the row-line order whenever the start signal is input in case that the start signal is input several times at predetermined time intervals during one image frame period.

### Claim 4 (depends on 3)

The display module as claimed in claim 3, wherein the sub-pixels included in each row-line are operated in the plurality of light emission sections whose number corresponds to the input number of the start signal during the one image frame period.

### Claim 5 (depends on 1)

The display module as claimed in claim 1, wherein each of the sub-pixels in each row-line an inorganic light emitting device and a transistor connected to the inorganic light emitting device, and
wherein the transistor is configured to be turned on based on the second control signal applied to the plurality of the light emission sections, and turned off based on the second control signal applied to the period between the consecutive image frame periods.

### Claim 6 (depends on 1)

The display module as claimed in claim 1, wherein the driving circuit further comprises a plurality of driver circuits configured to apply the second control signal for each row-line.

### Claim 7 (depends on 6)

The display module as claimed in claim 6, wherein each of the plurality of driver circuits comprises:
an output terminal for outputting a carry signal; and
a transistor comprising a gate terminal connected to the output terminal,
wherein the transistor is configured to select the second control signal applied to the sub-pixels included in each row-line from an input signal and outputs the same, based on the carry signal input through the gate terminal.

### Claim 8 (depends on 7)

The display module as claimed in claim 7, further comprising:
a first driver circuit configured to:
output the second control signal applied to the sub-pixels included in a first row-line among the plurality of driver circuits which generates a first carry signal based on the start signal,
select the second control signal applied to the sub-pixels included in the first row-line from the input signal and
output the same, based on the first carry signal, and
a second driver circuit is configured to:
output the second control signal applied to the sub-pixels included in a second row-line among the plurality of driver circuits which generates a second carry signal based on the first carry signal, and
generate the second control signal applied to the sub-pixels included in the second row-line from the input signal, based on the second carry signal.

### Claim 9 (depends on 8)

The display module as claimed in claim 8, wherein input signals to the first driver circuit and the second driver circuit are the same signals having different phases.

### Claim 10 (depends on 1)

The display module as claimed in claim 1, wherein the driving circuit is further configured to:
apply scan signals including the first control signal to the sub-pixels included in one row-line to set the PWM data voltage of the sub-pixels included in the one row-line, during a data setting section for the one row-line of all the row-lines, and
apply emission signals including the second control signal to the sub-pixels included in the one row-line to drive the display panel for the sub-pixels included in the one row-line to emit light for the time corresponding to the set PWM data voltage, during each of the plurality of the light emission sections for the one row-line.

### Claim 11 (depends on 10)

The display module as claimed in claim 10, wherein a first light emission section among the plurality of light emission sections is temporally consecutive with the data setting section, and
the plurality of light emission sections have a predetermined time interval.