# US 12,112,672 B2 · Drive circuit and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,112,672 B2 - Document ID: US12112672B2 - Status: Granted - Kind: B2 - Application number: 17/608,141 - Filed: 2021-08-24 - Published: 2024-01-18 - Granted: 2024-10-08 - Earliest claimed: 2021-08-16 - Assignees: Tcl China Star Optoelectronics Technology Co., Ltd. - Applicants: Tcl China Star Optoelectronics Technology Co., Ltd. - Inventors: Haoran Li - Web page: https://patentgrep.com/patent/US12112672B2 ## CPC - G06F 1/3265: {Power saving in display device} - G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} - G09G 3/3696: {Generation of voltages supplied to electrode drivers} - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2330/021: Power management, e.g. power saving - G09G 2330/028: Generation of voltages supplied to electrode drivers in a matrix display other than LCD - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract The disclosure discloses a drive circuit included a first transistor electrically connected to a first control terminal, a first voltage terminal, and a first node; an inductor electrically connected to the first node and a second voltage terminal; a first diode electrically connected to a grounding terminal and the first node; a first capacitor electrically connected to a second voltage terminal and the grounding terminal; and a discharging circuit module electrically connected to the first node and the grounding terminal to provide a discharging circuit to discharge the capacitor. ## Claims ### Claim 1 A drive circuit, comprising: a first transistor comprising a gate electrically connected to a first control terminal, a drain electrically connected to a first voltage terminal, and a source electrically connected to a first node; an inductor comprising a first end electrically connected to the first node, and a second end electrically connected to a second voltage terminal; a first diode comprising an anode electrically connected to a grounding terminal and a cathode electrically connected to the first node; a first capacitor comprising a first end electrically connected to the second voltage terminal and a second end electrically connected to the grounding terminal; and a discharging circuit module electrically connected to the first node and the grounding terminal and configured to discharge the first capacitor, wherein the drive circuit is configured to operate in a first drive phase, a second drive phase, a third drive phase, and a fourth drive phase, in the first drive phase, current flows in the inductor in a forward direction, and the inductor is charged, in the second drive phase, current flows in the inductor in the forward direction, the inductor is discharged, and the first capacitor is charged, in the third drive phase, the inductor is not discharged, no current flows in the inductor, and the inductor is charged by the first capacitor by means of the discharging circuit module, and in the fourth drive phase, the inductor is charged by input voltage to the first voltage terminal. ### Claim 2 (depends on 1) The drive circuit according to claim 1, wherein the discharging circuit module comprises a second transistor; and wherein the second transistor comprises a gate electrically connected to a second control terminal, a drain electrically connected to the first node, and a source electrically connected to the grounding terminal. ### Claim 3 (depends on 2) The drive circuit according to claim 2, wherein the first transistor is one selected from an N-type transistor and a P-type transistor, and the second transistor is another one selected from the N-type transistor and the P-type transistor. ### Claim 4 (depends on 2) The drive circuit according to claim 2, wherein the first transistor and the second transistor are arranged in a power management integrated chip. ### Claim 5 (depends on 1) The drive circuit according to claim 1, wherein the drive circuit further comprises a charge pump output module; and wherein the charge pump output module is electrically connected to the first node, and is configured to generate a predetermined voltage based on a voltage of the first node. ### Claim 6 (depends on 5) The drive circuit according to claim 5, wherein the charge pump output module further comprises a second capacitor, a second diode, a third diode, and a third capacitor; and wherein a first end of the second capacitor is electrically connected to the first node, a second end of the second capacitor is electrically connected to an anode of the second diode and a cathode of the third diode, a cathode of the second diode is electrically connected to the grounding terminal, an anode of the third diode is electrically connected to a first end of the third capacitor, and a second end of the third capacitor is electrically connected to the grounding terminal. ### Claim 7 (depends on 1) The drive circuit according to claim 1, wherein in the first drive phase and the fourth drive time interval phase, the first transistor is turned on, and in the second drive phase and the third drive phase, the first transistor is turned off. ### Claim 8 (depends on 1) The drive circuit according to claim 1, wherein in the first drive phase and the fourth drive phase, the discharging circuit module is turned on, and in the second drive phase and the third drive time interval phase, the discharging circuit module is turned off. ### Claim 9 A display device, comprising a display panel and a drive circuit, wherein the display panel is electrically connected to the drive circuit; and wherein the drive circuit comprises: a first transistor comprising a gate electrically connected to a first control terminal, a drain electrically connected to a first voltage terminal, and a source electrically connected to a first node; an inductor comprising a first end electrically connected to the first node and a second end electrically connected to a second voltage terminal; a first diode comprising an anode electrically connected to a grounding terminal and a cathode electrically connected to the first node; a first capacitor comprising a first end electrically connected to the second voltage terminal and a second end electrically connected to the grounding terminal; and a discharging circuit module electrically connected to the first node and the grounding terminal and configured to discharge the first capacitor, wherein the drive circuit is configured to operate in a first drive phase, a second drive phase, a third drive phase, and a fourth drive phase, in the first drive phase, current flows in the inductor in a forward direction, and the inductor is charged, in the second drive phase, current flows in the inductor in the forward direction, the inductor is discharged, and the first capacitor is charged, in the third drive phase, the inductor is not discharged, no current flows in the inductor, and the inductor is charged by the first capacitor by means of the discharging circuit module, and in the fourth drive phase, the inductor is charged by input voltage to the first voltage terminal. ### Claim 10 (depends on 9) The display device according to claim 9, wherein the discharging circuit module comprises a second transistor; and wherein the second transistor comprises a gate electrically connected to a second control terminal, a drain electrically connected to the first node, and a source of the second transistor is electrically connected to the grounding terminal. ### Claim 11 (depends on 10) The display device according to claim 10, wherein the first transistor is one selected from an N-type transistor and a P-type transistor, and the second transistor is another one selected from the N-type transistor and the P-type transistor. ### Claim 12 (depends on 10) The display device according to claim 10, wherein the first transistor and the second transistor are arranged in a power management integrated chip. ### Claim 13 (depends on 9) The display device according to claim 9, wherein the drive circuit further comprises a charge pump output module; and wherein the charge pump output module is electrically connected to the first node, and is configured to generate a predetermined voltage based on a voltage of the first node. ### Claim 14 (depends on 13) The display device according to claim 13, wherein the charge pump output module further comprises a second capacitor, a second diode, a third diode, and a third capacitor; and wherein a first end of the second capacitor is electrically connected to the first node, a second end of the second capacitor is electrically connected to an anode of the second diode and a cathode of the third diode, a cathode of the second diode is electrically connected to the grounding terminal, an anode of the third diode is electrically connected to a first end of the third capacitor, and a second end of the third capacitor is electrically connected to the grounding terminal. ### Claim 15 (depends on 9) The display device according to claim 9, wherein in the first drive phase and the fourth drive phase, the first transistor is turned on, and in the second drive phase and the third drive phase, the first transistor is turned off. ### Claim 16 (depends on 9) The display device according to claim 9, wherein in the first drive phase and the fourth drive phase, the discharging circuit module is turned on, and in the second drive phase and the third drive phase, the discharging circuit module is turned off.