Read retry scratch space
AssigneeMicron Technology, Inc.
InventorsRahul Mitchell Jairaj, Mark A. Hawes, Terry M. Grunzke
Life of this patent
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Abstract
Devices and techniques to recover data from a memory device are disclosed, including recovering data corresponding to a detected error in data stored on a memory array corresponding to a memory operation using one of a set of read offset values and loading the one of the set of read offset values used to recover data corresponding to the detected error in a temporary storage of the memory array as a custom read offset value for a subsequent memory operation. The temporary storage of the memory array can include a scratch space of the memory array separate from read retry offset registers of the memory device.
Claims20
A memory device comprising:
- a memory array having multiple blocks of memory cells;
- and
- a memory controller operably coupled to the memory array, the memory controller configured to perform operations comprising:
- in response to a detected error in data stored on the memory array corresponding to a memory operation, recover data corresponding to the detected error using one of a set of read offset values;
- and
- load the one of the set of read offset values used to recover data corresponding to the detected error in a scratch space of the memory array as a custom read offset value for a subsequent memory operation.
A memory device comprising:
- a memory array having multiple blocks of memory cells;
- and
- a memory controller operably coupled to the memory array, the memory controller configured to perform operations comprising:
- store a custom read offset value in a temporary storage of the memory array;
- determine if data stored on the memory array corresponding to a memory operation includes a detectable error;
- and
- recover data corresponding to the detectable error using the custom read offset value stored in the temporary storage of the memory array,
- wherein the memory device comprises read retry offset registers configured to store a set of read offset values for error correction, wherein the temporary storage of the memory array is separate from the read retry offset registers.
A memory device comprising:
- a memory array having multiple blocks of memory cells;
- and
- a memory controller operably coupled to the memory array, the memory controller configured to perform operations comprising:
- in response to a detected error in data stored on the memory array, recover data corresponding to the detected error using one of a set of read offset values;
- and
- load the one of the set of read offset values used to recover data corresponding to the detected error in a temporary storage of the memory array as a custom read offset value for a subsequent memory operation.
Dependencies are inferred from the claim text.