# US 12,111,716 B2 · Device and method for efficient transitioning to and from reduced power state

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- Number: US 12,111,716 B2
- Document ID: US12111716B2
- Status: Granted
- Kind: B2
- Application number: 18/304,849
- Filed: 2023-04-21
- Published: 2023-11-02
- Granted: 2024-10-08
- Earliest claimed: 2021-09-23
- Assignees: Advanced Micro Devices, Inc.
- Applicants: Advanced Micro Devices, Inc.
- Inventors: Mihir Shaileshbhai Doctor; Alexander J. Branover; Benjamin Tsien; Indrani Paul; Christopher T. Weaver; Thomas J. Gibney; Stephen V. Kosonocky; John P. Petry
- Web page: https://patentgrep.com/patent/US12111716B2

## CPC

- G06F 1/3287: by switching off individual functional units in the computer system
- G06F 1/3265: {Power saving in display device}
- G06F 1/3275: {Power saving in memory, e.g. RAM, cache}
- G06F 1/3278: {Power saving in modem or I/O interface}
- G06F 1/3296: by lowering the supply or operating voltage
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

A processing device and method for efficient transitioning to and from a reduced power state is provided. The processing device comprises a plurality of components having assigned registers used to store data to execute a program and a power management controller, in communication with the plurality of components. The power management controller receives an indication that the plurality of components are idle, executes a process to enter a component into a reduced power state in response to receiving an acknowledgement from the component of a request from the power management controller to remove power to the component, and executes a process to exit the component from the reduced power state in response to the component being active.

## Claims

### Claim 1

A processing device comprising:
a plurality of components having assigned registers used to store data to execute a program; and
a power management controller, in communication with the plurality of components, and configured to:
receive an indication that the plurality of components are idle;
execute a process to enter a component into a reduced power state in response to receiving an acknowledgement from the component of a request from the power management controller to remove power to the component; and
execute a process to exit the component from the reduced power state in response to the component being active.

### Claim 2 (depends on 1)

The processing device of claim 1, wherein the power management controller is configured to abort execution of the process to enter the component into the reduced power state in response to the component being active prior to receiving the acknowledgement of the request to remove power to the component.

### Claim 3 (depends on 1)

The processing device of claim 1, wherein the power management controller is configured to execute the process to exit the component from the reduced power state in a time period of 1 millisecond or less from a time when the component is indicated to be active after receiving the acknowledgement of the request.

### Claim 4 (depends on 1)

The processing device of claim 1, wherein the power management controller comprises hardware logic circuitry configured to send the request to remove power to the component and receive the acknowledgement of the request.

### Claim 5 (depends on 1)

The processing device of claim 1, wherein the power management controller is further configured to:
save data in one or more registers assigned to the component in response to the component being entered into the reduced power state; and
restore data in the one or more registers assigned to the component in response to the component being exited from the reduced power state.

### Claim 6 (depends on 5)

The processing device of claim 5, wherein the process to enter the component into the reduced power state includes saving data in the one or more registers assigned to the component in memory associated with the power management controller.

### Claim 7 (depends on 5)

The processing device of claim 5, wherein the process to exit the component from the reduced power state includes saving data in memory associated with the power management controller in the one or more registers assigned to the component.

### Claim 8 (depends on 1)

The processing device of claim 1, wherein the plurality of components include any one or a combination of the following components: a central processing unit (CPU); a graphics processing unit (GPU); a multi-media processing unit; a display controller; an input/output (I/O) hub; or a memory controller.

### Claim 9 (depends on 1)

The processing device of claim 1, wherein the reduced power state includes reducing power to the component or removing power from the component.

### Claim 10

A method for performing power state transitioning in a processing device comprising a plurality of components, the method comprising:
receiving, by a power management controller, an indication that the plurality of components are idle;
executing, by the power management controller, a process to enter a component into a reduced power state in response to receiving an acknowledgement from the component of a request from the power management controller to remove power to the component; and
executing, by the power management controller, a process to exit the component from the reduced power state in response to the component being active.

### Claim 11 (depends on 10)

The method of claim 10, further comprising aborting execution of the process to enter the component into the reduced power state in response to the component being active prior to receiving the acknowledgement of the request to remove power to the component.

### Claim 12 (depends on 10)

The method of claim 10, wherein the executing the process to exit the component from the reduced power state occurs in a time period of 1 millisecond or less from a time when component is indicated to be active after receiving the acknowledgement of the request.

### Claim 13 (depends on 10)

The method of claim 10, further comprising:
saving data in one or more registers assigned to the component in response to the component being entered into the reduced power state; and
restoring data in the one or more registers assigned to the component in response to the component being exited from the reduced power state.

### Claim 14 (depends on 13)

The method of claim 13, wherein the process to enter the component into the reduced power state includes saving data in the one or more registers assigned to the component in memory associated with the power management controller.

### Claim 15 (depends on 13)

The method of claim 13, wherein the process to exit the component from the reduced power state includes saving data in memory associated with the power management controller in the one or more register assigned to the component.

### Claim 16 (depends on 10)

The method of claim 10, wherein the component is any one of the following components: a central processing unit (CPU); a graphics processing unit (GPU); a multi-media processing unit; a display controller; an input/output (I/O) hub; or a memory controller.

### Claim 17 (depends on 10)

The method of claim 10, wherein the reduced power state includes reducing power to the component or removing power from the component.

### Claim 18

A non-transitory computer-readable medium comprising instructions that, when executed by a processing device comprising a plurality of components, cause the processing device to perform operations for performing power state transitioning, the operations comprising:
receiving an indication that the plurality of components are idle;
executing a process to enter a component into a reduced power state in response to receiving an acknowledgement from the component of a request to remove power to the component; and
executing a process to exit the component from the reduced power state in response to the component being active.

### Claim 19 (depends on 18)

The non-transitory computer-readable medium of claim 18, wherein the operations further comprise aborting execution of the process to enter the component into the reduced power state in response to the component being active prior to receiving the acknowledgement of the request to remove power to the component.

### Claim 20 (depends on 18)

The non-transitory computer-readable medium of claim 18, wherein the executing the process to exit the component from the reduced power state occurs in a time period of 1 millisecond or less from a time when the more component is indicated to be active after receiving the acknowledgement of the request.