# US 12,111,715 B2 · Memory structure

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- Number: US 12,111,715 B2
- Document ID: US12111715B2
- Status: Granted
- Kind: B2
- Application number: 18/105,258
- Filed: 2023-02-03
- Published: 2024-06-27
- Granted: 2024-10-08
- Earliest claimed: 2022-12-27
- Assignees: Team Group Inc.
- Applicants: Team Group Inc.
- Inventors: Yu Hsuan Yen; Hsi Lin Kuo; Wei Hsiang Wang; Chin Feng Chang
- Web page: https://patentgrep.com/patent/US12111715B2

## CPC

- G06F 1/3275: {Power saving in memory, e.g. RAM, cache}
- G06F 1/3296: by lowering the supply or operating voltage
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

The present invention provides a memory structure, which is disposed on a first circuit board and connected electrically to a system power supply of a second circuit board. The memory structure comprises a plurality of memory unit, a power control component, and a display component. The power control component receives a first voltage of the system power supply. The power control component includes a power management unit and a linear voltage stabilizing unit. The display component includes a light-emitting unit and a control unit. The power control component provides a second voltage to the plurality of memory units using the power management unit. The linear voltage stabilizing unit provides a third voltage to the light-emitting unit and the control unit. The power management unit distributes the power supply to the plurality of memory units, the light-emitting unit, and the control unit for further usage.

## Claims

### Claim 1

A memory structure, disposed on a first circuit board connected electrically to a second circuit board, connected electrically to a system power supply of said second circuit board, and comprising:
a plurality of memory units, disposed on said first circuit board, respectively;
a power control component, disposed on said first circuit board, receiving a first voltage of said system power supply, including a power management unit and a linear voltage stabilizing unit, and said power management unit connected electrically to said plurality of memory units; and
a display component, disposed on said first circuit board, including a light-emitting unit and a control unit, said light-emitting unit and said control unit connected electrically to said linear voltage stabilizing unit;
where said power management unit outputs a second voltage to said plurality of memory units, and said linear voltage stabilizing unit outputs a third voltage to said light-emitting unit and said control unit.

### Claim 2 (depends on 1)

The memory structure of claim 1, wherein said first voltage is greater than said third voltage, and said third voltage is greater than said second voltage.

### Claim 3 (depends on 1)

The memory structure of claim 1, wherein said light-emitting unit is a light-emitting diode.

### Claim 4 (depends on 1)

The memory structure of claim 1, and further comprising a signal processing component, disposed on said first circuit board, including a first signal processing unit and a second signal processing unit, said first signal processing unit connected electrically to said control unit and transmitting a first output signal, and said second signal processing unit connected electrically to said control unit and transmitting a second output signal.

### Claim 5 (depends on 1)

The memory structure of claim 1, wherein said first circuit board is a first printed circuit board (PCB).

### Claim 6 (depends on 4)

The memory structure of claim 4, wherein said signal processing component further includes a voltage detection device connected electrically to said first signal processing unit and said second signal processing unit.

### Claim 7 (depends on 4)

The memory structure of claim 4, wherein said control unit transmits a control signal to said light-emitting unit corresponding to said first output signal and said second output signal.

### Claim 8 (depends on 6)

The memory structure of claim 6, wherein said voltage detection device receives an integrated-circuit signal and transmits said integrated-circuit signal to said first signal processing unit or said second signal processing unit correspondingly.

### Claim 9 (depends on 8)

The memory structure of claim 8, wherein said voltage detection device is connected electrically to a high speed download packet access (HSDA) for transmitting said integrated-circuit signal.

### Claim 10 (depends on 8)

The memory structure of claim 8, wherein said voltage detection device is connected electrically to a high speed communication line (HSCL) for transmitting said integrated-circuit signal.