# US 12,111,552 B2 · Array substrate, manufacturing method thereof, and panel

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- Number: US 12,111,552 B2
- Document ID: US12111552B2
- Status: Granted
- Kind: B2
- Application number: 17/420,100
- Filed: 2021-05-28
- Published: 2023-06-22
- Granted: 2024-10-08
- Earliest claimed: 2021-03-19
- Assignees: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Applicants: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Inventors: Haijun Wang; Jiangbo Yao
- Web page: https://patentgrep.com/patent/US12111552B2

## CPC

- G02F 1/13312: {Circuits comprising photodetectors for purposes other than feedback}
- G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)}
- G02F 1/136218: {Shield electrodes}
- G02F 1/136222: {Colour filters incorporated in the active matrix substrate}
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS

## Abstract

The present application provides an array substrate, a manufacturing method thereof, and a display panel. A display area of the array substrate includes a functional area, a sensing unit is arranged on a part of a base substrate corresponding to the functional area, the sensing unit is aligned with a pixel electrode, and a metal-covered area and a non-metal-covered area can form a same voltage difference with a common electrode, so that a deflection angle of each part of liquid crystal molecules in the functional area is consistent, and a problem of a difference between brightness and darkness of the display panel is solved.

## Claims

### Claim 1

An array substrate, wherein the array substrate comprises a display area, the display area comprises at least one functional area, and the array substrate further comprises:
a base substrate;
a plurality of pixel units provided on the base substrate, wherein each of the pixel units includes a first driving thin film transistor;
at least one sensing unit configured for environment sensing, wherein the sensing unit is disposed on a part of the base substrate corresponding to the functional area, each of the at least one sensing unit includes a second driving thin film transistor, a functional thin film transistor, a switching thin film transistor, and a storage capacitor, the storage capacitor is configured to receive and store the electrical signal, and the switching thin film transistor is configured to control a transmission of the electrical signal stored in the storage capacitor to a processor;
a planarization layer disposed on the base substrate and covering the at least one sensing unit and the pixel units; and
a plurality of pixel electrodes disposed on a side of the planarization layer away from the base substrate,
wherein the first driving thin film transistor is connected to a first pixel electrode of the pixel electrodes, the second driving thin film transistor is connected to a second pixel electrode of the pixel electrodes that is different from the first pixel electrode, the functional thin film transistor is configured for sensing an external environment to generate a corresponding electrical signal, and in a thickness direction of the array substrate, an orthographic projection area of each of the at least one sensing unit on the base substrate is located within an orthographic projection area of the second pixel electrode of the pixel electrodes on the base substrate,
wherein a source of the second driving thin film transistor is connected to a data line, and a drain of the second driving thin film transistor is connected to the corresponding one of the pixel electrodes.

### Claim 2 (depends on 1)

The array substrate according to claim 1, wherein a plurality of diffusion particles are provided in a portion of the planarization layer corresponding to the functional area.

### Claim 3 (depends on 2)

The array substrate according to claim 2, wherein the diffusion particles comprise at least one of silica particles, titanium dioxide particles, or barium sulfate particles.

### Claim 4 (depends on 3)

The array substrate according to claim 3, wherein diameters of the diffusion particles are greater than or equal to 1 nanometer and less than or equal to 1 micrometer.

### Claim 5 (depends on 1)

The array substrate according to claim 1, wherein the array substrate further comprises:
at least one shielding electrode disposed on the side of the planarization layer away from the base substrate and between the at least one sensing unit and the pixel electrodes, wherein in the thickness direction of the array substrate, an orthographic projection area of each of the at least one shielding electrode on the base substrate partially overlaps with an orthographic projection area of a corresponding one of the at least one sensing unit on the base substrate; and
an insulating layer disposed on the side of the planarization layer away from the base substrate, and covering the at least one shielding electrode, wherein the pixel electrodes are disposed on a side of the insulating layer away from the base substrate.

### Claim 6 (depends on 1)

The array substrate according to claim 1, wherein the functional thin film transistor is a photoelectric thin film transistor.

### Claim 7

A display panel, the display panel comprising:
an array substrate;
a color filter substrate disposed opposite to the array substrate; and
a liquid crystal layer disposed between the array substrate and the color filter substrate;
wherein the array substrate comprises a display area, the display area comprises at least one functional area, and the array substrate further comprises:
a base substrate;
a plurality of pixel units provided on the base substrate, wherein each of the pixel units includes a first driving thin film transistor;
at least one sensing unit configured for environment sensing, wherein the sensing unit is disposed on a part of the base substrate corresponding to the functional area, each of the at least one sensing unit includes a second driving thin film transistor, a functional thin film transistor, a switching thin film transistor, and a storage capacitor, the storage capacitor is configured to receive and store the electrical signal, and the switching thin film transistor is configured to control a transmission of the electrical signal stored in the storage capacitor to a processor;
a planarization layer disposed on the base substrate and covering the at least one sensing unit and the pixel units; and
a plurality of pixel electrodes disposed on a side of the planarization layer away from the base substrate,
wherein the first driving thin film transistor is connected to a first pixel electrode of the pixel electrodes, the second driving thin film transistor is connected to a corresponding one second pixel electrode of the pixel electrodes that is different from the first pixel electrode, the functional thin film transistor is configured for sensing an external environment to generate a corresponding electrical signal, and in a thickness direction of the array substrate, an orthographic projection area of each of the at least one sensing unit on the base substrate is located within an orthographic projection area of the second pixel electrode of the pixel electrodes on the base substrate,
wherein a source of the second driving thin film transistor is connected to a data line, and a drain of the second driving thin film transistor is connected to the corresponding one of the pixel electrodes.

### Claim 8 (depends on 7)

The display panel according to claim 7, wherein a plurality of diffusion particles are provided in a portion of the planarization layer corresponding to the functional area.

### Claim 9 (depends on 8)

The display panel according to claim 8, wherein the diffusion particles comprise at least one of silica particles, titanium dioxide particles, or barium sulfate particles.

### Claim 10 (depends on 9)

The display panel according to claim 9, wherein diameters of the diffusion particles are greater than or equal to 1 nanometer and less than or equal to 1 micrometer.

### Claim 11 (depends on 7)

The display panel according to claim 7, wherein the array substrate further comprises:
at least one shielding electrode disposed on the side of the planarization layer away from the base substrate and between the at least one sensing unit and the pixel electrodes, wherein in the thickness direction of the array substrate, an orthographic projection area of each of the at least one shielding electrode on the base substrate partially overlaps with an orthographic projection area of a corresponding one of the at least one sensing unit on the base substrate; and
an insulating layer disposed on the side of the planarization layer away from the base substrate, and covering the at least one shielding electrode, wherein the pixel electrodes are disposed on a side of the insulating layer away from the base substrate.

### Claim 12 (depends on 7)

The display panel according to claim 7, wherein the functional thin film transistor is a photoelectric thin film transistor.

### Claim 13

A method of manufacturing an array substrate, comprising:
providing a base substrate, wherein the base substrate comprises a display area, the display area comprises at least one functional area, a plurality of pixel units is are formed on the base substrate, each of the pixel units includes a first driving thin film transistor, at least one sensing unit is formed on a portion of the base substrate corresponding to the functional area, and each of the at least one sensing unit includes a second driving thin film transistor, a functional thin film transistor, a switching thin film transistor, and a storage capacitor, the storage capacitor is configured to receive and store the electrical signal, and the switching thin film transistor is configured to control a transmission of the electrical signal stored in the storage capacitor to a processor;
forming a planarization layer on the base substrate and covering the at least one sensing unit and the pixel units; and
forming a plurality of pixel electrodes on a side of the planarization layer away from the base substrate,
wherein the first driving thin film transistor is connected to a first pixel electrode of the pixel electrodes, the second driving thin film transistor is connected to a second pixel electrode of the pixel electrodes that is different from the first pixel electrode, the functional thin film transistor is configured for sensing an external environment to generate a corresponding electrical signal, and in a thickness direction of the array substrate, an orthographic projection area of each of the at least one sensing unit on the base substrate is located within an orthographic projection area of the second pixel electrode of the pixel electrodes on the base substrate,
wherein a source of the second driving thin film transistor is connected to a data line, and a drain of the second driving thin film transistor is connected to the corresponding one of the pixel electrodes.

### Claim 14 (depends on 13)

The method according to claim 13, wherein the functional thin film transistor is a photoelectric thin film transistor.