# US 12,111,379 B2 · Operation circuit having lower calibration time and calibration method thereof

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- Number: US 12,111,379 B2
- Document ID: US12111379B2
- Status: Granted
- Kind: B2
- Application number: 18/147,004
- Filed: 2022-12-28
- Published: 2023-07-27
- Granted: 2024-10-08
- Earliest claimed: 2022-01-25
- Assignees: Richtek Technology Corporation
- Applicants: Richtek Technology Corporation
- Inventors: Yu-Hsin Lih; Ming-Jun Hsiao
- Web page: https://patentgrep.com/patent/US12111379B2

## CPC

- G01R 19/165: Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R 35/005: {Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references (G01R33/0035, G01R35/002 take precedence)}
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

A calibration method is configured for calibrating an operation circuit which has a variant offset. The operation circuit includes at least one comparator circuit having a first variant offset. The calibration method provides an adjustable offset to calibrate the variant offset. The method includes: resetting an adjustment parameter to an initial value and configuring the operation circuit to a calibration mode; conducting an initial calibration procedure according to a comparison result of the comparator circuit, to decide an operation calibration code having plural bits; configuring the operation circuit to an operation mode; conducting a predetermined operation procedure according to the operation calibration code, wherein the operation calibration code corresponds to the adjustable offset; conducting a less bit number calibration procedure according to the adjustment parameter and a test calibration code to update the adjustment parameter or the operation calibration code; and repeating the above.

## Claims

### Claim 1

A calibration method, which is configured to operably calibrate an operation circuit, wherein the operation circuit has a variant offset and includes at least one comparator circuit, wherein the calibration method is configured to operably provide an adjustable offset to calibrate the variant offset, wherein the variant offset includes a first variant offset of the at least one comparator circuit; the calibration method comprising the following procedures:
procedure P100: configuring the operation circuit to a calibration mode and resetting an adjustment parameter to an initial value, and subsequently conducting an initial calibration procedure according to the comparator circuit, to decide an operation calibration code having N bits, wherein N is a positive integer greater than or equal to two;
procedure P200: configuring the operation circuit to an operation mode, and subsequently the operation circuit operating according to the operation calibration code, to conduct a predetermined operation procedure, wherein the operation calibration code corresponds to the adjustable offset and the operation calibration code is configured to operably calibrate the variant offset in the predetermined operation procedure; and
procedure P300: configuring the operation circuit to the calibration mode and adjusting a test calibration code according to the adjustment parameter, and subsequently the operation circuit operating according to the test calibration code, to conduct a less bit number calibration procedure, thus updating the adjustment parameter or updating the operation calibration code according to the updated adjustment parameter, wherein the test calibration code is correlated with the operation calibration code, and subsequently proceeding back to the procedure P200.

### Claim 2 (depends on 1)

The calibration method of claim 1, wherein the operation circuit further includes: an amplifier circuit coupled to the comparator circuit, wherein the variant offset further includes: a second variant offset of the amplifier circuit.

### Claim 3 (depends on 1)

The calibration method of claim 1, wherein the less bit number calibration procedure includes the following procedures:
configuring the operation circuit to the calibration mode; and
conducting a sub-calibration procedure P305 for at most M times or conducting a sub-calibration procedure P306 for at most M times, wherein M is a positive integer smaller than N;
subsequently proceeding back to the procedure P200;
wherein the sub-calibration procedure P305 is configured to operably adjust a least significant bit of the test calibration code from the operation calibration code according to a single slope, so as to decide whether to keep adjusting the test calibration code or to update the operation calibration code;
wherein the sub-calibration procedure P306 is configured to operably adjust a bit of the test calibration code by a dichotomous search method, so as to decide whether to keep adjusting the test calibration code or to update the operation calibration code;
wherein M in the less bit number calibration procedure is a constant or a variable.

### Claim 4 (depends on 3)

The calibration method of claim 3, wherein the sub-calibration procedure P305 includes the following procedures:
setting the test calibration code, so that the test calibration code is equal to a sum of the operation calibration code superimposed with the adjustment parameter; and
determining whether the adjustment parameter is the initial value, wherein when the adjustment parameter is the initial value, conducting a direction determination step S310, and when the adjustment parameter is not the initial value, conducting a difference comparison step S320;
wherein the direction determination step S310 includes the following steps:
providing the adjustable offset corresponding to the test calibration code to the operation circuit;
the comparator circuit operating according to the adjustable offset, to generate a comparison result;
deciding a calibration direction according to the comparison result; and
superimposing the adjustment parameter with a predetermined unit difference corresponding to the calibration direction, to update the adjustment parameter;
wherein the difference comparison step S320 includes the following steps:
providing the adjustable offset corresponding to the test calibration code to the operation circuit;
the comparator circuit operating according to the adjustable offset, to generate a comparison result; and
determining a direction of the comparison result, wherein when the comparison result is inverse-phase to the calibration direction, proceeding to a calibration code updating step S323; otherwise proceeding to an adjustment parameter updating step S324;
wherein the calibration code updating step S323 includes the following steps:
superimposing the operation calibration code with the adjustment parameter, to update the operation calibration code; and
resetting the adjustment parameter to the initial value;
wherein the adjustment parameter updating step S324 includes the following steps:
superimposing the adjustment parameter with the unit difference, to update the adjustment parameter; or
wherein the sub-calibration procedure P306 includes the following procedures:
the adjustment parameter indicating a serial bit order of a present test bit of the test calibration code;
setting the present test bit of the test calibration code to enable state, whereas, setting the rest lower significant bits of the test calibration code to disable state;
providing the adjustable offset corresponding to the test calibration code to the operation circuit;
the comparator circuit operating according to the adjustable offset, to generate the comparison result; and
determining a relative relationship between the adjustable offset and the variant offset, wherein when the comparison result indicates that the adjustable offset is greater than the variant offset of the operation circuit, setting the present test bit of the test calibration code to disable state;
determining whether the serial bit order is the least significant bit, wherein when the adjustment parameter indicates that the serial bit order has already proceeded to the least significant bit, conducting a calibration code updating step S325; otherwise proceeding to an adjustment parameter updating step S326;
wherein the calibration code updating step S325 includes the following steps:
updating the calibration code according to the test calibration code; and
resetting the adjustment parameter to the initial value; and
wherein the adjustment parameter updating step S326 includes the following step:
subtracting one from the present adjustment parameter, to update the adjustment parameter.

### Claim 5 (depends on 4)

The calibration method of claim 4, wherein the initial value of the adjustment parameter corresponding to the sub-calibration procedure P305 is zero, and the initial value of the adjustment parameter corresponding to the sub-calibration procedure P306 is N.

### Claim 6 (depends on 4)

The calibration method of claim 4, wherein the calibration code updating step S323 further includes the following steps:
superimposing the operation calibration code with the adjustment parameter according to the calibration direction, and subtracting one unit difference from a sum of the operation calibration code superimposed with the adjustment parameter, to update the operation calibration code.

### Claim 7 (depends on 4)

The calibration method of claim 4, wherein the procedure P300 includes the following procedure:
conducting the less bit number calibration procedure by operating the comparator circuit within one clock period, wherein the unit difference is one unit of a least significant bit (LSB) in correspondence to the calibration direction.

### Claim 8 (depends on 3)

The calibration method of claim 3, wherein M is equal to one.

### Claim 9 (depends on 3)

The calibration method of claim 3, wherein a time length required by the sub-calibration procedure P305 for the M times or a time length required by the sub-calibration procedure P306 for the M times is smaller than a time length required by the predetermined operation procedure.

### Claim 10 (depends on 3)

The calibration method of claim 3, wherein a time length required by the sub-calibration procedure P305 for the M times or a time length required by the sub-calibration procedure P306 for the M times is smaller than a time length required by the initial calibration procedure.

### Claim 11 (depends on 3)

The calibration method of claim 3, wherein a characteristic curve of the adjustable offset versus the operation calibration code or the test calibration code is a sub-radix-2 curve.

### Claim 12 (depends on 3)

The calibration method of claim 3, wherein the initial calibration procedure includes:
consecutively conducting the sub-calibration procedure P306 for N times, wherein the initial value of the adjustment parameter corresponding to the sub-calibration procedure P306 is N.

### Claim 13 (depends on 3)

The calibration method of claim 3, wherein in the predetermined operation procedure, the comparator circuit is configured to operably compare an input signal with a reference threshold or the comparator circuit is for use in a digital-to-analog (DAC) converter.

### Claim 14

An operation circuit having a lower calibration time, wherein the operation circuit has a variant offset; the operation circuit comprising:
at least one comparator circuit, which is configured to operably compare a first input end of the at least one comparator circuit and a second input end of the at least one comparator circuit, to generate a comparison result according to a difference between the first input end and the second input end, wherein the variant offset includes a first variant offset of the at least one comparator circuit;
an offset generation circuit coupled to the at least one comparator circuit, wherein the offset generation circuit is configured to operably generate an adjustable offset according to an operation calibration code having N bits, so as to calibrate the variant offset;
an offset adjustment circuit, which is configured to operably generate the operation calibration code according to the following procedures, so as to calibrate the variant offset:
procedure P100: configuring the operation circuit to a calibration mode and resetting an adjustment parameter to an initial value, and subsequently conducting an initial calibration procedure according to the comparator circuit, to decide the operation calibration code having N bits, wherein N is a positive integer greater than or equal to two;
procedure P200: configuring the operation circuit to an operation mode, and subsequently the operation circuit operating according to the operation calibration code, to conduct a predetermined operation procedure, wherein the operation calibration code corresponds to the adjustable offset and the operation calibration code is configured to operably calibrate the variant offset in the predetermined operation procedure; and
procedure P300: configuring the operation circuit to the calibration mode and adjusting a test calibration code according to the adjustment parameter, and subsequently the operation circuit operating according to the test calibration code, to conduct a less bit number calibration procedure, thus updating the adjustment parameter or updating the operation calibration code according to the updated adjustment parameter, wherein the test calibration code is correlated with the operation calibration code, and subsequently proceeding back to the procedure P200.

### Claim 15 (depends on 14)

The operation circuit of claim 14, further comprising: an amplifier circuit coupled to the comparator circuit, wherein the variant offset further includes: a second variant offset of the amplifier circuit.

### Claim 16 (depends on 15)

The operation circuit of claim 15, wherein in the predetermined operation procedure, the comparator circuit is configured to operably compare an input signal with a reference threshold, wherein the comparison result indicates an operation state of the operation circuit; or, the comparator circuit is a digital-to-analog (DAC) converter, wherein in the predetermined operation procedure, the amplifier circuit is configured to operably amplify an analog signal, to generate an amplification signal at the first input end of the at least one comparator circuit and at the second input end of the at least one comparator circuit, wherein the comparator circuit is configured to operably compare the amplification signal with an adjustable reference, so as to generate a digital output code corresponding to the analog signal.

### Claim 17 (depends on 16)

The operation circuit of claim 16, wherein the DAC converter includes: a first DAC converter, which is configured to operably provide the adjustable reference in the predetermined operation procedure, and wherein the offset generation circuit includes: a second DAC converter, which is constituted by a part of bits of the first DAC converter.

### Claim 18 (depends on 14)

The operation circuit of claim 14, wherein the less bit number calibration procedure includes the following procedures:
configuring the operation circuit to the calibration mode; and
conducting a sub-calibration procedure P305 for at most M times or conducting a sub-calibration procedure P306 for at most M times, wherein M is a positive integer smaller than N;
subsequently proceeding back to the procedure P200;
wherein the sub-calibration procedure P305 is configured to operably adjust a least significant bit of the test calibration code from the operation calibration code according to a single slope, so as to decide whether to keep adjusting the test calibration code or to update the operation calibration code;
wherein the sub-calibration procedure P306 is configured to operably adjust a bit of the test calibration code by a dichotomous search method, so as to decide whether to keep adjusting the test calibration code or to update the operation calibration code;
wherein M in the less bit number calibration procedure is a constant or a variable.

### Claim 19 (depends on 18)

The operation circuit of claim 18, wherein M is equal to one.

### Claim 20 (depends on 18)

The operation circuit of claim 18, wherein a time length required by the sub-calibration procedure P305 for the M times or a time length required by the sub-calibration procedure P306 for the M times is smaller than a time length required by the predetermined operation procedure.

### Claim 21 (depends on 18)

The operation circuit of claim 18, wherein a time length required by the sub-calibration procedure P305 for the M times or a time length required by the sub-calibration procedure P306 for the M times is smaller than a time length required by the initial calibration procedure.

### Claim 22 (depends on 18)

The operation circuit of claim 18, wherein a characteristic curve of the adjustable offset versus the operation calibration code or the test calibration code is a sub-radix-2 curve.

### Claim 23 (depends on 18)

The operation circuit of claim 18, wherein the initial calibration procedure includes:
consecutively conducting the sub-calibration procedure P306 for N times, wherein the initial value of the adjustment parameter corresponding to the sub-calibration procedure P306 is N.

### Claim 24 (depends on 18)

The operation circuit of claim 18, wherein in the predetermined operation procedure, the comparator circuit is configured to operably compare an input signal with a reference threshold or the comparator circuit is for use in a digital-to-analog (DAC) converter.

### Claim 25 (depends on 14)

The operation circuit of claim 14, wherein the sub-calibration procedure P305 includes the following procedures:
setting the test calibration code, so that the test calibration code is equal to a sum of the operation calibration code superimposed with the adjustment parameter; and
determining whether the adjustment parameter is the initial value, wherein when the adjustment parameter is the initial value, conducting a direction determination step S310, and when the adjustment parameter is not the initial value, conducting a difference comparison step S320;
wherein the direction determination step S310 includes the following steps:
providing the adjustable offset corresponding to the test calibration code to the operation circuit;
the comparator circuit operating according to the adjustable offset, to generate a comparison result;
deciding a calibration direction according to the comparison result; and
superimposing the adjustment parameter with a predetermined unit difference corresponding to the calibration direction, to update the adjustment parameter;
wherein the difference comparison step S320 includes the following steps:
providing the adjustable offset corresponding to the test calibration code to the operation circuit;
the comparator circuit operating according to the adjustable offset, to generate a comparison result; and
determining a direction of the comparison result, wherein when the comparison result is inverse-phase to the calibration direction, proceeding to a calibration code updating step S323; otherwise proceeding to an adjustment parameter updating step S324;
wherein the calibration code updating step S323 includes the following steps:
superimposing the operation calibration code with the adjustment parameter, to update the operation calibration code; and
resetting the adjustment parameter to the initial value;
wherein the adjustment parameter updating step S324 includes the following steps:
superimposing the adjustment parameter with the unit difference, to update the adjustment parameter; or
wherein the sub-calibration procedure P306 includes the following procedures:
the adjustment parameter indicating a serial bit order of a present test bit of the test calibration code;
setting the present test bit of the test calibration code to enable state, whereas, setting the rest lower significant bits of the test calibration code to disable state;
providing the adjustable offset corresponding to the test calibration code to the operation circuit;
the comparator circuit operating according to the adjustable offset, to generate the comparison result; and
determining a relative relationship between the adjustable offset and the variant offset, wherein when the comparison result indicates that the adjustable offset is greater than the variant offset of the operation circuit, setting the present test bit of the test calibration code to disable state;
determining whether the serial bit order is the least significant bit, wherein when the adjustment parameter indicates that the serial bit order has already proceeded to the least significant bit, conducting a calibration code updating step S325; otherwise proceeding to an adjustment parameter updating step S326;
wherein the calibration code updating step S325 includes the following steps:
updating the calibration code according to the test calibration code; and
resetting the adjustment parameter to the initial value; and
wherein the adjustment parameter updating step S326 includes the following step:
subtracting one from the present adjustment parameter, to update the adjustment parameter.

### Claim 26 (depends on 25)

The operation circuit of claim 25, wherein the initial value of the adjustment parameter corresponding to the sub-calibration procedure P305 is zero, and the initial value of the adjustment parameter corresponding to the sub-calibration procedure P306 is N.

### Claim 27 (depends on 25)

The operation circuit of claim 25, wherein the calibration code updating step S323 further includes the following steps:
superimposing the operation calibration code with the adjustment parameter according to the calibration direction, and subtracting one unit difference from a sum of the operation calibration code superimposed with the adjustment parameter, to update the operation calibration code.

### Claim 28 (depends on 25)

The operation circuit of claim 25, wherein the procedure P300 includes the following procedure:
conducting the less bit number calibration procedure by operating the comparator circuit within one clock period, wherein the unit difference is one unit of a least significant bit (LSB) in correspondence to the calibration direction.