Testing system and testing method
AssigneeRealtek Semiconductor Corp.
InventorsShih-Hsuan Chiu, Meng-Che Li
Life of this patent
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Abstract
A testing system includes a signal generator circuit, a jitter modulation circuit, and an oscilloscope circuit. The signal generator circuit is configured to generate a clock pattern signal with a single clock pattern frequency. The jitter modulation circuit is configured to generate a jitter signal. A device-under-test is configured to receive an input signal. The input signal is a combination signal of the clock pattern signal and the jitter signal. The device-under-test includes a clock data recovery circuit and is further configured to generate an output signal according to the input signal. The oscilloscope circuit is configured to receive the output signal for determining performance of the clock data recovery circuit.
Claims20
A testing system, comprising:
- a signal generator circuit configured to generate a clock pattern signal with a single clock pattern frequency;
- a jitter modulation circuit configured to generate a jitter signal, wherein a device-under-test is configured to receive an input signal, wherein the input signal is a combination signal of the clock pattern signal and the jitter signal, wherein the device-under-test comprises a clock data recovery circuit and is further configured to generate an output signal according to the input signal;
- and
- an oscilloscope circuit configured to receive the output signal for determining performance of the clock data recovery circuit.
A testing method, comprising:
- generating, by a signal generator circuit, a clock pattern signal with a single clock pattern frequency;
- generating, by a jitter modulation circuit, a jitter signal;
- receiving, by a device-under-test, an input signal, wherein the input signal is a combination signal of the clock pattern signal and the jitter signal, wherein the device-under-test comprises a clock data recovery circuit;
- generating, by the device-under-test, an output signal according to the input signal;
- and
- receiving, by an oscilloscope circuit, the output signal for determining performance of the clock data recovery circuit.
Dependencies are inferred from the claim text.