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US 12,100,459 B2Granted
Semiconductor device
AssigneeKioxia Corporation
InventorsShinya Okuno, Shigeki Nagasaka, Toshiyuki Kouchi
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a memory circuit, a first FIFO, a second FIFO and an input/output circuit. The memory circuit outputs data. The first FIFO receives data from the memory circuit and outputs data synchronously with a first clock signal. The second FIFO receives data output from the first FIFO and outputs data synchronously with the first clock signal. The input/output circuit outputs data output from the second FIFO. The second FIFO is disposed in the vicinity of the input/output circuit than the first FIFO.
Claims11
A semiconductor device comprising:
- a memory chip including:
- a memory cell array;
- a core circuit configured to read/out data from the memory cell array;
- a first buffer configured to receive the data from the core circuit with a first bus width and store the data;
- a second buffer configured to receive data from the first buffer with the first bus width and store the data;
- a first input/output circuit configured to input the data or output data;
- and
- a first via extending through the memory chip, and electrically connected to the first input/output circuit;
- and
- an interface chip including:
- a first conductive pad formed on a surface of the interface chip;
- a third buffer configured to exchange data with the memory chip through the first conductive pad with the first bus width;
- a fourth buffer configured to exchange data with the third buffer with a second bus width;
- and
- a second input/output circuit configured to output data sent from the fourth buffer to an exterior with the second bus width and send data received from the exterior to the fourth buffer, wherein
- the interface chip is stacked with the memory chip such that the first conductive pad is electrically connected to the first via.
13 more elements
Dependencies are inferred from the claim text.