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US 12,099,748 B2Granted
NAND temperature-aware operations
AssigneeMicron Technology, Inc.
InventorsChiara Cerafogli, Fulvio Rori, Jonathan W Oh, Giuseppe Cariello
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Abstract
Devices and techniques for NAND temperature-aware operations are disclosed herein. A device controller can receive a command to write data to a component in the device. A temperature corresponding to the component can be obtained in response to receiving the command. The command can be executed by the controller to write data to the component. Executing the command can include writing the temperature into a management portion of the device that is separate from a user portion of the device to which the data is written.
Claims24
A storage device comprising:
- a NAND array that includes a NAND component;
- and
- a controller configured to:
- receive a command to write data to the NAND component;
- obtain a temperature corresponding to the NAND component in response to the receipt of the command;
- execute the command to write the data to the NAND component including the controller configured to:
- calculate an error correction code (ECC) for the data being written to the NAND component;
- write the calculated ECC to ECC bytes in a management portion of the storage device that is separate from a user portion of the storage device to which the data is written, wherein the ECC bytes into which the temperature is written includes unused ECC bytes, wherein the unused ECC bytes are excess bits in a space pre-dedicated by the controller to hold an ECC for the NAND component and distinct from flag bytes;
- and
- write the temperature to the unused ECC bytes along with the calculated ECC;
- receive a read command to read the data from the NAND component;
- read, in response to the read command, the data from the user portion and the temperature from the management portion concurrently from the NAND component;
- provide, to a host invoking the read command, the temperature from the management portion as part of a response to the host of the read command that includes the data from the user portion, and in response to a cross temperature event, provide a representation of the temperature as an alert as part of the response to the host of the read command;
- and
- enable a recovery operation using the temperature read from the NAND component.
12 more elements
An apparatus comprising:
- an interface to a memory device that includes a memory page;
- and
- a processing circuitry configured to:
- receive a command to write data to the memory page;
- obtain a temperature corresponding to the memory page in response to receipt of the command;
- execute the command to write data to the memory page including writing the temperature into unused bits of a dedicated error correction code (ECC) portion of the memory device that is separate from a user portion of the memory device, the dedicated ECC portion being a space that is pre-dedicated by the processing circuitry to hold ECC data, the unused bits being excess bits of the dedicated ECC portion after an ECC code is written;
- read, in response to a command to read the memory page, the data from the user portion and the temperature from the dedicated ECC portion;
- providing the temperature from the dedicated ECC portion as part of a response that includes the data from the user portion to a host invoking the command to read the memory page, and in response to a cross temperature event, providing a representation of the temperature as an alert as part of the response to the host of the read command;
- and
- select a recovery operation using the temperature.
7 more elements
Dependencies are inferred from the claim text.