Envelope detector circuit, corresponding receiver circuit and galvanic isolator device

A circuit, comprising:

• a rectifier stage including:
• a differential input transistor pair coupled between a reference voltage node and a first intermediate node, the differential input transistor pair being configured to receive a radio-frequency amplitude modulated signal;
• an active load circuit comprising:
• a load transistor having a current path coupled between said first intermediate node and said supply voltage node;
• and
• a low-pass circuit comprising a series circuit formed by a resistor and capacitor coupled in series between said first intermediate node and said supply voltage node, wherein a second intermediate node of said series circuit is connected to a control terminal of said load transistor;
• and
• a resistive element coupled between said intermediate node and said supply voltage node in parallel with said load circuit;
• wherein a rectified signal indicative of an envelope of said radio-frequency amplitude modulated signal is produced at said intermediate node;
• and
• an amplifier stage coupled to receive said rectified signal from said intermediate node and configured to produce an amplified rectified signal at an output node.

A circuit, comprising:

• a rectifier stage including:
• a differential input transistor pair coupled between a reference voltage node and an intermediate node, the differential input transistor pair being configured to receive a radio-frequency amplitude modulated signal;
• a load circuit coupled between the intermediate node and a supply voltage node;
• and
• a resistive element coupled between said intermediate node and said supply voltage node in parallel with said load circuit;
• wherein a rectified signal indicative of an envelope of said radio-frequency amplitude modulated signal is produced at said intermediate node;
• and
• an amplifier stage comprising:
• a current-matching transistor having a current path arranged between said supply voltage node and a current control node, and a control terminal coupled to said intermediate node;
• a bias source coupled between said current control node and said reference voltage node to sink a current from said current control node;
• and
• a current-mirroring circuit having an input current path arranged between said supply voltage node and said current control node and having an output current path arranged between said supply voltage node and an output node where an amplified rectified signal is produced.