Air spacer formation with a spin-on dielectric material

A semiconductor device, comprising:

• a first spacer layer on a sidewall of a gate capping structure;
• a second spacer layer on a sidewall of a source/drain (S/D) contact structure;
• an air spacer between the first and second spacer layers;
• and
• a spin-on dielectric structure sealing the air spacer between the first and second spacer layers, wherein:
• top surfaces of the spin-on dielectric structure, the S/D contact structure, and the gate capping structure are coplanar;
• and
• the spin-on dielectric structure is in contact with at least one of the sidewall of the gate capping structure and the sidewall of the S/D contact structure.

A semiconductor device, comprising:

• a gate structure on a substrate;
• a gate capping structure on the gate structure;
• a spacer structure on sidewalls of the gate structure and the gate capping structure, wherein the spacer structure comprises a first spacer layer, a second spacer layer, an air spacer between the first and second spacer layers, and a spin-on dielectric structure sealing the air spacer, wherein the first spacer layer is in contact with the sidewalls of the gate structure and the gate capping structure;
• and
• a source/drain (S/D) contact structure in contact with the second spacer layer, wherein the spin-on dielectric structure is in contact with at least one of a sidewall of the gate capping structure and a sidewall of the S/D contact structure.