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US 12,093,431 B2Granted
Security plugin for a system-on-a-chip platform
AssigneeIntel Corporation
InventorsManoj R. Sastry, Alpa Narendra Trivedi, Men Long
Life of this patent
Estimating the term…
Abstract
Systems and techniques for a System-on-a-Chip (SoC) security plugin are described herein. A component message may be received at an interconnect endpoint from an SoC component. The interconnect endpoint may pass the component message to a security component via a security interlink. The security component may secure the component message, using a cryptographic engine, to create a secured message. The secured message is delivered back to the interconnect endpoint via the security interlink and transmitted across the interconnect by the interconnect endpoint.
Claims18
An apparatus for a system-on-a-chip, the apparatus comprising:
- a cryptographic circuit including:
- a cryptographic engine selected from a plurality of cryptographic engines to implement Advanced Encryption Standard (AES), and
- a standard interface that is generic to the plurality of cryptographic engines, wherein, in operation, unencrypted messages from an initiator component to be received by a system-on-a-chip interconnect interface are to be provided to the cryptographic engine via the standard interface to produce encrypted messages to be transmitted to a destination component, wherein the standard interface is to transmit each of the unencrypted messages to an interface of the cryptographic engine to make the cryptographic engine available to a fabric of the system-on-a-chip;
- a cryptographic controller to manage a cryptographic key to be used by the cryptographic engine to produce the encrypted messages, wherein the cryptographic controller is to perform key negotiation with another component, and wherein a seed key is to be designated to the cryptographic controller, wherein the seed key is an initialization key;
- and
- a cryptographic state manager to manage cryptographic session states of a cryptographic session between the initiator component and the destination component, wherein the cryptographic state manager is to maintain a data structure, the data structure to include a field for a session key.
3 more elements
A system-on-a-chip comprising:
- a cryptographic circuit including:
- a cryptographic engine selected from a plurality of cryptographic engines to implement Advanced Encryption Standard (AES), and
- a standard interface that is generic to the plurality of cryptographic engines, wherein, in operation, unencrypted messages from an initiator component to be received by a system-on-a-chip interconnect interface are to be provided to the cryptographic engine via the standard interface to produce encrypted messages to be transmitted to a destination component, wherein the standard interface is to transmit each of the unencrypted messages to an interface of the cryptographic engine to make the cryptographic engine available to a fabric of the system-on-a-chip;
- a cryptographic controller to manage a cryptographic key to be used by the cryptographic engine to produce the encrypted messages, wherein the cryptographic controller is to perform key negotiation with another component, and wherein a seed key is to be designated to the cryptographic controller, wherein the seed key is an initialization key;
- and
- a cryptographic state manager to manage cryptographic session states of a cryptographic session between the initiator component and the destination component, wherein the cryptographic state manager is to maintain a data structure, the data structure to include a field for a session key.
3 more elements
A system comprising:
- a system-on-a-chip comprising:
- a cryptographic circuit including:
- a cryptographic engine selected from a plurality of cryptographic engines to implement Advanced Encryption Standard (AES), and
- a standard interface that is generic to the plurality of cryptographic engines, wherein, in operation, unencrypted messages from an initiator component to be received by a system-on-a-chip interconnect interface are to be provided to the cryptographic engine via the standard interface to produce encrypted messages to be transmitted to a destination component, wherein the standard interface is to transmit each of the unencrypted messages to an interface of the cryptographic engine to make the cryptographic engine available to a fabric of the system-on-a-chip,
- a cryptographic controller to manage a cryptographic key to be used by the cryptographic engine to produce the encrypted messages, wherein the cryptographic controller is to perform key negotiation with another component, and wherein a seed key is to be designated to the cryptographic controller, wherein the seed key is an initialization key, and
- a cryptographic state manager to manage cryptographic session states of a cryptographic session between the initiator component and the destination component, wherein the cryptographic state manager is to maintain a data structure, the data structure to include a field for a session key;
- and
- a system memory coupled with the system-on-a-chip.
5 more elements
Dependencies are inferred from the claim text.