Back to results
US 12,067,767 B2Granted
Buses for pattern-recognition processors
AssigneeMicron Technology, Inc.
InventorJ. Thomas Pawlowski
Life of this patent
Estimating the term…
Abstract
Disclosed are methods and systems, among which is a system that includes a pattern-recognition processor, a central processing unit (CPU) coupled to the pattern-recognition processor via a pattern-recognition bus, and memory coupled to the CPU via a memory bus. In some embodiments, the pattern-recognition bus and the memory bus form about the same number of connections to the pattern-recognition processor and the memory, respectively.
Claims20
A system, comprising:
- a pattern-recognition processor comprising a plurality of memory elements and a detection cell coupled to the plurality of memory elements that when in operation search a data stream received by the pattern-recognition processor according to a search criterion, wherein the pattern-recognition processor is configured to receive a first signal over a bus, wherein the pattern-recognition processor is configured to process the first signal to perform a first function at the pattern-recognition processor identically to a memory processing the first signal when received over the bus to perform the first function at the memory, wherein the pattern-recognition processor comprises an output, wherein the pattern-recognition processor is configured to transmit an output interrupt signal from the output in response to an analysis of the data stream by the pattern-recognition processor satisfying the search criterion by advancing to a last search term of the search criterion and matching it.
A system, comprising:
- a pattern-recognition processor comprising an integrated circuit having a first input pin as an address pin configured to receive a first signal over a bus and a second input pin as a data pin configured to receive a data stream to be searched by the pattern-recognition processor, wherein the pattern-recognition processor is configured to process the first signal as a first type of pattern-recognition processor configuration signal when the pattern-recognition processor is in a first mode of operation, wherein the pattern-recognition processor is configured to process the first signal as a second type of pattern-recognition processor configuration signal when the pattern-recognition processor is in a second mode of operation, wherein the pattern-recognition processor is configured to process the first signal as a third type of pattern-recognition processor configuration signal when the pattern-recognition processor is in a third mode of operation, wherein the pattern-recognition processor is configured to receive the first signal at the address pin separate from a receipt of the data stream to be searched by the pattern-recognition processor at the data pin.
A system, comprising:
- a pattern-recognition processor comprising a plurality of memory elements and a detection cell coupled to the plurality of memory elements that when in operation search a data stream received by the pattern-recognition processor according to a search criterion, wherein the pattern-recognition processor is configured to receive a signal over a bus, wherein the pattern-recognition processor is configured to process the signal to perform a first function at the pattern-recognition processor identically to a memory processing the signal when received over the bus to perform the first function at the memory when the pattern-recognition processor operates in a first mode, wherein the pattern-recognition processor is configured to process the signal to perform a second function at the pattern-recognition processor differently from the memory processing the signal when received over the bus to perform a third function at the memory when the pattern-recognition processor operates in a second mode, wherein the pattern-recognition processor comprises a register, wherein the pattern-recognition processor is configured to periodically receive a request to determine whether the pattern-recognition processor has detected a match as a satisfied criterion by advancing to a last search term of the search criterion and matching it when analyzing the data stream, wherein the pattern-recognition processor is configured to store an indication of the match in the register.
Dependencies are inferred from the claim text.