Systolic array including fused multiply accumulate with efficient prenormalization and extended dynamic range
AssigneeAmazon Technologies, Inc.
InventorThomas Elmer
Life of this patent
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Abstract
Systems and methods are provided to perform multiply-accumulate operations of at least one normalized number in a systolic array. The systolic array can obtain a first input and detect that the first input is denormal. Based on determining the first input is denormal, the systolic array can generate a first normalized number by normalizing the first input. Processing elements of the systolic array can include a multiplier and an adder. The multiplier can multiply the first normalized number by a second normal or normalized number to generate a multiplier product and the adder can add an input partial sum to the multiplier product to generate an addition result.
Claims20
A systolic circuit comprising:
- a systolic array comprising processing elements;
- and
- a first normalizer comprising a first denormal detector, the first normalizer configured to:
- receive a first input represented in floating-point with a first bit-length;
- detect by the first denormal detector, that the first input is denormal;
- and
- generate a first normalized number represented in floating-point with a second bit-length, wherein the second bit-length is greater than the first bit-length;
- wherein an individual processing element of the systolic array is configured to:
- multiply the first normalized number by a second number to generate a multiplier product;
- and
- add an input partial sum with the multiplier product to generate an addition result.
A method for systolic processing by a processing element in a systolic array of processing elements, the method comprising:
- receiving, by a normalizer of the processing element, a first input represented in floating-point with a first bit-length;
- detecting, by a first denormal detector of the normalizer, that the first input is denormal;
- generating a first normalized number represented in floating-point with a second bit-length;
- multiplying, by the processing element, the first normalized number by a second number to generate a multiplier product;
- and
- adding, by the processing element, an input partial sum with the multiplier product to generate an addition result.
Non-transitory computer-readable media including computer-executable instructions that, when executed by a systolic circuit comprising a normalizer and an array of processing elements, cause the systolic circuit to:
- receive, by the normalizer, a first input represented in floating-point with a first bit-length;
- detect, by a denormal detector of the normalizer, that the first input is denormal;
- generate a first normalized number represented in floating-point with a second bit-length;
- multiply the first normalized number by a second number to generate a multiplier product;
- and
- add an input partial sum with the multiplier product to generate an addition result.
Dependencies are inferred from the claim text.