Low power chip-to-chip bidirectional communications

A receiver comprising:

• a plurality of multi-input comparators (MICs) configured to receive symbols of a codeword, the symbols received via wires of a multi-wire bus, the codeword representing an aggregate sum of a plurality of sub-channel constituent codewords, each sub-channel constituent codeword representing a weight applied to an associated sub-channel vector of a plurality of sub-channel vectors of an orthogonal matrix;
• the plurality of MICs configured to a plurality of comparator outputs using a plurality of multi-input comparators (MICs), each MIC having a set of input coefficients representing a corresponding sub-channel vector of the plurality of sub-channel vectors, each sub-channel vector (i) mutually orthogonal and (ii) orthogonal to a reverse-channel sub-channel vector, each comparator output indicative of the weight applied to the corresponding sub-channel vector;
• a plurality of samplers configured to sample the plurality of comparator outputs to generate a set of forward-channel output bits;
• a serializer configured to generate a sequence of reverse-channel bits;
• and
• an output driver configured to transmit the sequence of reverse-channel bits, each reverse-channel bit transmitted by sourcing or sinking current from each wire of the multi-wire bus through a set of termination impedances according to the reverse-channel sub-channel vector.