Reducing resistor conductivity modulation during amplification

An apparatus comprising:

• a power amplifier circuit comprising:
• a first differential amplifier comprising a reference input and differential outputs;
• and
• a first pair of resistors, respective resistors of the first pair of resistors connected between respective differential inputs of the first differential amplifier and respective ones of the differential outputs of the first differential amplifier;
• a digital-to-analog converter comprising:
• differential reference inputs;
• and
• a second pair of resistors, respective resistors of the second pair of resistors connected to the respective differential inputs of the first differential amplifier and selectively connected to the differential reference inputs;
• a reference generation circuit comprising:
• a second differential amplifier comprising differential outputs and a reference input;
• the differential outputs respectively connected to the differential reference inputs of the digital-to-analog converter;
• and
• a third pair of resistors, respective resistors of the third pair of resistors connected between respective differential inputs of the second differential amplifier and respective ones of the differential outputs of the second differential amplifier;
• and
• scaling means for providing a first voltage at body terminals of the first pair of resistors, a second voltage at body terminals of the second pair of resistors, and a third voltage at body terminals of the third pair of resistors such that a summation of the first voltage and the third voltage reduced by the second voltage is approximately equal to an average of a common-mode reference voltage and a common-mode output voltage, the common-mode reference voltage present at both the reference input of the first amplifier and the reference input of the second amplifier, the common-mode output voltage present at the differential outputs of the first amplifier, the scaling means connected to the reference input of the first amplifier, the reference input of the second amplifier, the differential outputs of the first amplifier, the body terminals of the first pair of resistors, the body terminals of the second pair of resistors, and the body terminals of the third pair of resistors.

A method for reducing resistor conductivity modulation during amplification, the method comprising:

• amplifying, using a power amplifier circuit, an analog input signal to generate an amplified signal, the amplified signal comprising a common-mode output voltage, the power amplifier circuit comprising a first pair of resistors and a first differential amplifier connected to a common-mode reference voltage;
• generating, using a digital-to-analog converter, the analog input signal based on a digital input signal and differential reference voltages, the digital-to-analog converter comprising a second pair of resistors;
• generating, using a reference generation circuit, the differential reference voltages, the reference generation circuit comprising a third pair of resistors and a second differential amplifier connected to the common-mode reference voltage;
• and
• providing a first voltage at body terminals of the first pair of resistors, a second voltage at body terminals of the second pair of resistors, and a third voltage at body terminals of the third pair of resistors such that a summation of the first voltage and the third voltage reduced by the second voltage is approximately equal to an average of the common-mode reference voltage and the common-mode output voltage.

An apparatus comprising:

• a power amplifier circuit comprising:
• a first differential amplifier comprising a reference input configured to accept a common-mode reference voltage, the first differential amplifier configured to amplify an analog input signal to generate an amplified signal, the amplified signal comprising a common-mode output voltage;
• and
• a first pair of resistors, respective resistors of the first pair of resistors connected between respective differential inputs of the first differential amplifier and respective differential outputs of the first differential amplifier;
• a boost circuit connected to a positive power terminal of the first differential amplifier and configured to generate a supply voltage that varies based on the amplified signal;
• a common-mode reference circuit connected to the positive power terminal of the first differential amplifier and the reference input of the first differential amplifier, the common-mode reference circuit configured to generate the common-mode reference voltage based on the supply voltage;
• a digital-to-analog converter comprising differential reference inputs and a second pair of resistors, respective resistors of the second pair of resistors connected to the respective differential inputs of the first differential amplifier, the digital-to-analog converter configured to generate the analog input signal by selectively connecting the respective resistors of the second pair of resistors to the differential reference inputs based on an input digital signal;
• a reference generation circuit comprising:
• a second differential amplifier comprising a reference input configured to accept the common-mode reference voltage, the second differential amplifier configured to generate the differential reference voltages;
• and
• a third pair of resistors, respective resistors of the third pair of resistors connected between respective differential inputs of the second differential amplifier and respective differential outputs of the second differential amplifier;
• and
• a scaling circuit connected to the common-mode reference voltage, the common-mode output voltage, body terminals of the first pair of resistors, body terminals of the second pair of resistors, and body terminals of the third pair of resistors, the scaling circuit configured to:
• provide a first voltage to the body terminals of the first pair of resistors;
• provide a second voltage to the body terminals of the second pair of resistors;
• and
• provide a third voltage to the body terminals of the third pair of resistors, at least one voltage of the first voltage, the second voltage, and the third voltage based on at least one of the common-mode output voltage or the common-mode reference voltage.