Circuitry to compensate for data drift in analog neural memory in an artificial neural network
AssigneeSilicon Storage Technology, Inc.
InventorsHieu Van Tran, Steven Lemke, Vipin Tiwari, Nhan Do, Mark Reiten
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Abstract
Numerous embodiments are provided for compensating for drift error in non-volatile memory cells within a VMM array in an analog neuromorphic memory system. For example, in one embodiment, a circuit is provided for compensating for drift error during a read operation, the circuit comprising a data drift monitoring circuit coupled to the array for generating an output indicative of data drift; and a bitline compensation circuit for generating a compensation current in response to the output from the data drift monitoring circuit and injecting the compensation current into one or more bitlines of the array.
Claims23
A circuit comprising:
- a data drift monitoring circuit coupled to a vector-by-matrix multiplication array, the data drift monitoring circuit to generate an output indicative of an amount of data drift;
- and
- a bitline compensation circuit to generate a compensation current in response to the output from the data drift monitoring circuit and inject the compensation current into an array output current received from one or more bitlines of the vector-by-matrix multiplication array.
A circuit comprising:
- a bitline compensation circuit to generate a compensation current and inject the compensation current into an array output current received from one or more bitlines of an array, the compensation current to compensate for drift error during a read operation of the array.
A circuit comprising:
- a bitline compensation circuit to scale an array output current received from one or more bitlines of an array to compensate for drift error during a read operation of the array.
A circuit comprising:
- a bitline compensation circuit to shift an array output current received from one or more bitlines of an array to compensate for drift error during a read operation of the array.
A method comprising:
- monitoring an amount of data drift in a vector-by-matrix multiplication array;
- generating a bitline compensation current in response to the amount of data drift;
- and
- injecting the bitline compensation current into an array output current received from one or more bitlines of the vector-by-matrix multiplication array during a read operation to compensate for drift error.
Dependencies are inferred from the claim text.