Back to results
US 12,052,335 B2Granted
Serial receiver circuit with follower skew adaptation
AssigneeApple Inc.
InventorsRyan D. Bartling, Jafar Savoj
Life of this patent
Estimating the term…
Abstract
A serial data receiver circuit included in a computer system may include both an analog and an ADC-based receiver circuit. A front-end circuit generates different equalized signals based on received signals that encode a serial data stream that includes multiple data symbols. During startup of a communication channel, phase information generated by the analog receiver circuit may be used to generate clock signals for the ADC-based receiver circuit. After a period of time, the ADC-based receiver circuit can generate its own phase information to be used in the generation of the clock signals.
Claims20
An apparatus, comprising:
- a front-end circuit configured to generate an equalized signal using a plurality of signals that encode a serial data stream that includes a plurality of data symbols;
- an analog receiver circuit configured to sample, using a plurality of first clock signals, the equalized signal to generate a plurality of first samples;
- a clock generator circuit configured to:
- generate the plurality of first clock signals using first phase information based on a phase difference between the plurality of first clock signals and the plurality of first samples;
- and
- generate a plurality of second clock signals using the first phase information;
- and
- an analog-to-digital converter (ADC)-based receiver circuit that includes an analog-to-digital converter circuit wherein the ADC-based receiver circuit is configured to sample the equalized signal using the plurality of second clock signals to generate a plurality of recovered data symbols.
5 more elements
A method, comprising:
- generating, by a front-end circuit, an equalized signal using a plurality of signals that encode a serial data stream that includes a plurality of data symbols;
- sampling, by an analog receiver circuit using a plurality of first clock signals, the equalized signal to generate a plurality of first samples;
- generating, by a clock generator circuit, the plurality of first clock signals using first phase information based on a phase difference between the plurality of first clock signals and the plurality of first samples;
- generating, by the clock generator circuit, a plurality of second clock signals using the first phase information;
- and
- sampling, by an analog-to-digital converter (ADC)-based receiver circuit, the equalized signal using the plurality of second clock signals to generate a plurality of recovered data symbols, wherein the ADC-based receiver circuit includes an analog-to-digital converter circuit.
3 more elements
An apparatus, comprising:
- a first device that includes a first functional circuit block, wherein the first device is configured to:
- receive, from the first functional circuit block, a serial data stream that includes a plurality of data symbols;
- generate a plurality of signals that encode the serial data stream;
- and
- transmit the plurality of signals via a communication channel;
- and
- a second device coupled to the first device via the communication channel, wherein the second device includes a plurality of receiver circuits, and wherein the second device is configured to generate an equalized signal using a plurality of signals that encode a serial data stream that includes a plurality of data symbols;
- and
- wherein a first receiver circuit of the plurality of receiver circuits, that includes an analog receiver circuit, is configured to sample using a plurality of first clock signals, the equalized signal to generate a plurality of first samples;
- wherein a second receiver circuit of the plurality of receiver circuits, that includes an analog-to-digital converter circuit, is configured to sample the equalized signal using a plurality of second clock signals to generate a plurality of recovered data symbols;
- and
- wherein the second device is further configured to:
- generate the plurality of first clock signals using first phase information based on a phase difference between the plurality of first clock signals and the plurality of first samples;
- and
- generate the plurality of second clock signals using the first phase information.
12 more elements
Dependencies are inferred from the claim text.