Method and apparatus for managing reception of secure data packets

A communication circuit for high speed authentication of data packets, the communication circuit comprising:

• a network interface configured to:
• receive a data packet from a network,
• store the data packet in a buffer as it is received from the network,
• and
• manage transmission of the data packet from the buffer to a shared memory location on a memory device via a communication bus, wherein a first end of the communication bus is connected to the buffer and a second end of the communication bus is connected to the memory device;
• a software packet processing module in communication with the shared memory location reads the data packet from the shared memory location when transmission of the data packet to the shared memory location is complete;
• and
• an inline logic circuit operatively connected to the communication bus between the input buffer and the shared memory, the inline logic circuit configured to:
• read the data packet from the communication bus with a read-only function as the data packet is transferred from the buffer to the shared memory location without interfering with the transmission of the data packet by the network interface, and
• authenticate the data packet in parallel to the data packet being transferred by the network interface from the buffer to the shared memory, wherein the inline logic circuit authenticates the data packet by:
• parsing header data from the data packet,
• reading a security association from the header data of the data packet indicating the data packet requires decryption, and
• determining a decryption protocol, selected from a plurality of decryption protocols, for decryption of a payload in the data packet as a function of the security association.

A communication circuit for high speed authentication of data packets, the communication circuit comprising:

• a network interface configured to:
• receive a data packet from a network,
• store the data packet in a buffer as it is received from the network, and
• transmit the data packet from the buffer to a destination via a communication bus,
• wherein a first end of the communication bus is connected to the buffer and a second end of the communication bus is connected to the destination;
• a software packet processing module is in communication with the destination to read the data packet when transmission of the data packet to the destination is complete;
• and
• an inline logic circuit operatively connected to the communication bus between the buffer and the destination, the inline logic circuit configured to:
• read the data packet from the communication bus with a read-only function as the data packet is transferred from the buffer to the destination without interfering with the transmission of the data packet by the network interface, and
• authenticate the data packet in parallel to the data packet being transferred from the buffer to the destination, wherein the inline logic circuit authenticates the data packet by:
• parsing header data from the data packet,
• reading a security association from the header data of the data packet indicating the data packet requires decryption, and
• determining a decryption protocol, selected from a plurality of decryption protocols, for decryption of a payload in the data packet as a function of the security association.