Low latency HARQ protocol for URLLC services

An apparatus comprising:

• a processor circuit and a memory circuit, wherein the memory is arranged to store instructions for the processor circuit, wherein the processor circuit is arranged to receive at least one data packets wherein the processor circuit is arranged to request a retransmission of a data packet when there is a non-successful transmission of the data packet, wherein the processor circuit is arranged to perform a first HARQ operation associated with a first HARQ entity, wherein the processor circuit is arranged to perform a second HARQ operation associated with a second HARQ entity, wherein the first HARQ operation is different from the second HARQ operation, wherein a first HARQ entity is associated with a first logical channel and a second HARQ entity is associated with a second logical channel, wherein the first logical channel is different from the second logical channel, wherein the processor circuit is arranged to select and/or apply for a received resource assignment on the PDCCH control channel one of the first HARQ entity or the second HARQ entity based on at least one Radio Network Temporary Identifier, wherein the processor circuit is arranged to receive a configuration message when using the at least one Radio Network Temporary Identifier, wherein the configuration message causes the apparatus to be configured with a new Radio Network Temporary Identifier, wherein the processor circuit is arranged to apply a blind decoding process, wherein the blind decoding process tests all Radio Network Temporary Identifiers, wherein the processor circuit is arranged to determine which of the first HARQ entity or the second HARQ entity to select based on the blind decoding process.