In-memory computing method and apparatus

An in-memory computing method, adapted for a processor to perform multiply-and-accumulate (MAC) operations on a memory, wherein the memory comprises a plurality of input lines and a plurality of output lines crossing each other, a plurality of cells respectively disposed at intersections of the input lines and the output lines, and a plurality of sense amplifiers respectively connected to the output lines, the method comprising:

• transforming a format of binary data of a plurality of weights from a floating-point format into a quantized format by truncating at least a portion of fraction bits of the binary data and calculating complements of remaining bits of the binary data, and programming the transformed binary data of the plurality of weights into the plurality of cells;
• performing a tuning procedure by iteratively inputting binary data of a plurality of input signals into the plurality of input lines, integrating outputs sensed by the sense amplifiers, and adjusting the binary data of the plurality of weights programmed into the cells based on the integrated outputs for a number of iterations;
• and
• reshaping the binary data of the plurality of weights based on a probability of reducing bits with a value of one in the binary data of each weight after the number of iteration, and repeating the tuning procedure until an end condition is met.