Verifying or reading a cell in an analog neural memory in a deep learning artificial neural network
AssigneeSilicon Storage Technology, Inc.
InventorsHieu Van Tran, Vipin Tiwari, Nhan Do, Mark Reiten
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Abstract
Numerous embodiments of programming, verifying, and reading systems and methods for use with a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed. Selected cells can be programmed and verified with extreme precision to hold one of N different values. During a read operation, the system determines which of the N different values is stored in a selected cell.
Claims12
A circuit for determining a value stored in a memory cell during a read or verify operation, the circuit comprising:
- a memory cell outputting a current at an input node;
- a switch coupled to the input node for pulling the input node to ground prior to the read or verify operation;
- a capacitor coupled to the memory cell at the input node;
- and
- a comparator with a first input coupled to the input node and a second input coupled to one of a plurality of voltage references, wherein an output of the comparator indicates the value stored in the memory cell.
A circuit for determining a value stored in a memory cell during a read or verify operation, the circuit comprising:
- a memory cell drawing a current from an input node;
- a transistor comprising a first terminal and a second terminal, the second terminal coupled to the input node;
- a capacitor coupled between a voltage source and the first terminal of the transistor;
- a switch coupled to the first terminal of the transistor for pulling the first terminal of the transistor to a voltage of the voltage source prior to the read or verify operation;
- and
- a comparator with a first input coupled to the first terminal of the transistor and a second input coupled to one of a plurality of voltage references, wherein an output of the comparator indicates the value stored in the memory cell.
Dependencies are inferred from the claim text.