An apparatus for correcting a mismatch between a first segment and a second segment of a Digital-to-Analog Converter, DAC, wherein the first segment generates a first contribution to an analog output signal of the DAC based on a first number of bits of a digital input word for the DAC, and wherein the second segment generates a second contribution to the analog output signal based on a second number of bits of the digital input word, the apparatus comprising:
- an input configured to receive the digital input word;
- a first processing circuit for the first number of bits comprising a first filter configured to modify the first number of bits in order to generate first modified bits;
- a second processing circuit for the second number of bits comprising a second filter configured to modify the second number of bits in order to generate second modified bits;
- and
- an output configured to output a modified digital input word for the DAC, wherein the modified digital input word is based on the first modified bits and the second modified bits.