Semiconductor device and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorGeorgios Vellianitis
Life of this patent
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Abstract
A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a semiconductor channel layer, a gate structure, complex regions, a source terminal and a drain terminal. The gate structure is disposed on the semiconductor channel layer. The source terminal and the drain terminal are disposed on the semiconductor channel layer. The complex regions ae respectively disposed between the source terminal and the semiconductor channel layer and between the drain terminal and the semiconductor channel layer.
Claims20
A semiconductor device, comprising:
- a semiconductor channel layer having a bottom surface continuously extending from a first sidewall of the semiconductor channel layer to a second sidewall of the semiconductor channel layer opposite the first sidewall;
- a gate structure disposed over the semiconductor channel layer;
- a source/drain electrode disposed over the semiconductor channel layer;
- and
- a complex region extending between the source/drain electrode and the semiconductor channel layer, wherein the complex region is spaced from the bottom surface of the semiconductor channel layer.
A semiconductor device, comprising:
- a semiconductor channel layer;
- a gate structure disposed over the semiconductor channel layer;
- a source/drain electrode disposed over the semiconductor channel layer;
- and
- a complex region extending between the source/drain electrode and the semiconductor channel layer, wherein the complex region has a nonplanar upper surface, such that peripheral portions of the complex region have a first height measured from a bottom of the semiconductor channel layer, and central portions of the complex region have a second height measured from the bottom of the semiconductor channel layer, and the first height is different from the second height.
A semiconductor device, comprising:
- a semiconductor channel layer;
- a gate structure disposed over the semiconductor channel layer;
- a first source/drain electrode disposed over the semiconductor channel layer on a first side of the gate structure;
- a second source/drain electrode disposed over the semiconductor channel layer on a second side of the gate structure opposite the first side;
- and
- a first complex region bordering a bottom surface of the first source/drain electrode;
- and
- a second complex region bordering a bottom surface of the second source/drain electrode.
Dependencies are inferred from the claim text.