Push-pull buffer circuit

A buffer circuit, comprising:

• a first transistor, wherein the first transistor is an n-channel field effect transistor, the first transistor including:
• a first current terminal coupled to a load terminal;
• a second current terminal;
• and
• a control terminal coupled to a preamplifier input terminal;
• a second transistor, wherein the second transistor is a p-channel field effect transistor, the second transistor including:
• a first current terminal coupled to the second current terminal of the first transistor;
• and
• a second current terminal;
• a third transistor, wherein the third transistor is an n-channel field effect transistor, the third transistor including:
• a first current terminal coupled to a power supply terminal;
• a second current terminal coupled to the second current terminal of the second transistor;
• and
• a control terminal coupled to the second current terminal of the second transistor;
• and
• a fourth transistor, wherein the fourth transistor is an n-channel field effect transistor, the fourth transistor including:
• a first current terminal coupled to the power supply terminal;
• a second current terminal coupled to the load terminal;
• and
• a control terminal coupled to the control terminal of the third transistor.

A buffer circuit comprising:

• a constant current source;
• a common drain circuit configured to source current from the constant current source to a load terminal, wherein the common drain circuit includes:
• a first transistor including:
• a first current terminal coupled to the load terminal;
• a second current terminal coupled to the constant current source;
• and
• a control terminal coupled to a preamplifier terminal;
• a common source circuit coupled to the load terminal, and configured to sink current from the load terminal, the common source circuit includes:
• a second transistor including:
• a first current terminal coupled to the load terminal;
• a second current terminal coupled to a ground terminal;
• and
• a control terminal;
• a control transistor coupled between the constant current source and the common source circuit, and configured to control the common source circuit based on a current from the constant current source that bypasses the common drain circuit, the control transistor includes:
• a first current terminal coupled to the constant current source;
• and
• a second current terminal coupled to the control terminal of the second transistor;
• and
• a current mirror circuit including:
• the second transistor;
• and
• a third transistor including:
• a first current terminal coupled to the second current terminal of the control transistor;
• a second current terminal coupled to the ground terminal;
• and
• a control terminal coupled to the first current terminal of the third transistor and the control terminal of the second transistor;
• and
• wherein:
• the first transistor, the second transistor, and the third transistor are n-channel field effect transistors;
• and
• the control transistor is a p-channel field effect transistor.

An amplifier circuit, comprising:

• a preamplifier circuit including:
• a feedback input;
• and
• a preamp output;
• and
• a buffer circuit including:
• a first transistor, wherein the first transistor is an n-channel field effect transistor, the first transistor including:
• a first current terminal coupled to the feedback input;
• a second current terminal;
• and
• a control terminal coupled to the preamp output;
• a second transistor, wherein the second transistor is a p-channel field effect transistor, the second transistor including:
• a first current terminal coupled to the second current terminal of the first transistor;
• and
• a second current terminal;
• a third transistor, wherein the third transistor is an n-channel field effect transistor, the third transistor including:
• a first current terminal coupled to the feedback input;
• a second current terminal coupled to a ground terminal;
• and
• a control terminal coupled to second current terminal of the second transistor;
• and
• a fourth transistor, wherein the fourth transistor is an n-channel field effect transistor, the fourth transistor including:
• a first current terminal coupled to the second current terminal of the second transistor;
• a second current terminal coupled to the ground terminal;
• and
• a control terminal coupled to the second current terminal of the second transistor.