Processor system and method for increasing data-transfer bandwidth during execution of a scheduled parallel process

A method in a processor system, the method comprising:

• identifying a target subset of primary memory units in a set of primary memory units based on a set of data transfer requests;
• selecting a combination of broadcast buses in a set of broadcast buses based on the target set of primary memory units, each broadcast bus in the set of broadcast buses electrically coupled to a respective subset of primary memory units in the set of primary memory units;
• for each broadcast bus in the combination of broadcast buses, selecting a respective data transfer mode in a set of data transfer modes, the set of data transfer modes comprising:
• a unicast data transfer mode;
• and
• a multicast data transfer mode;
• and
• transferring source data from a data buffer to the target subset of primary memory units via the combination of broadcast buses by transferring, for each broadcast bus in the combination of broadcast buses, source data via a respective broadcast bus according to the respective data transfer mode.

A system comprising:

• a set of broadcast buses, each broadcast bus in the set of broadcast buses:
• electrically coupled to a respective subset of primary memory units in a set of primary memory units;
• and
• configured to operate according to a selected data transfer mode in a set of data transfer modes, the set of data transfer modes comprising:
• a unicast data transfer mode;
• and
• a multicast data transfer mode;
• and
• a broadcast scheduler configured to:
• select a combination of broadcast buses, in the set of broadcast buses, based on a target subset of primary memory units in the set of primary memory units, the target subset of primary memory units based on a set of data transfer requests;
• transfer source data in a data buffer to the target subset of primary memory units in the set of primary memory units via the combination of broadcast buses;
• and
• for each broadcast bus in the combination of broadcast buses:
• select a respective data transfer mode in the set of data transfer modes;
• and
• transfer the source data via a respective broadcast bus according to the respective data transfer mode.

A system comprising:

• a set of broadcast buses, each broadcast bus in the set of broadcast buses electrically coupled to a respective subset of primary memory units in a set of primary memory units;
• a primary memory unit queue:
• configured to store a set of data transfer requests;
• and
• comprising a set of broadcast bus subqueues, each broadcast bus subqueue, in the set of primary memory unit subqueues, corresponding to a respective broadcast bus in the set of broadcast buses, the set of broadcast bus subqueues comprising a first broadcast bus subqueue configured to:
• store a first data transfer request indicating a unicast data transfer mode for a first broadcast bus in the set of broadcast buses;
• and
• store a second data transfer request indicating a multicast data transfer mode for the first broadcast bus;
• and
• a broadcast scheduler configured to:
• select a combination of broadcast buses, in the set of broadcast buses, based on a target subset of primary memory units in the set of primary memory units, the target subset of primary memory units based on the set of data transfer requests;
• and
• transfer source data in a data buffer to the target subset of primary memory units in the set of primary memory units via the combination of broadcast buses.

A method in a processor system, the method comprising:

• identifying a target subset of primary memory units in a set of primary memory units based on a set of data transfer requests;
• based on a first data transfer request in the set of data transfer requests:
• identifying a first target primary memory unit in the target subset of primary memory units, the first target primary memory unit electrically coupled to a first broadcast bus in the set of broadcast buses;
• and
• identifying a second target primary memory unit in the target subset of primary memory units, the second target primary memory unit electrically coupled to the first broadcast bus;
• selecting a combination of broadcast buses in a set of broadcast buses based on the target set of primary memory units, each broadcast bus in the set of broadcast buses electrically coupled to a respective subset of primary memory units in the set of primary memory units;
• and
• transferring source data from a data buffer to the target subset of primary memory units via the combination of broadcast buses by:
• transferring the source data from the data buffer to the first target primary memory units via the first broadcast bus in a first operation;
• and
• transferring the source data from the data buffer to the second target primary memory units via the first broadcast bus in a second operation.