Lockstep comparators and related methods

An apparatus comprising:

• first comparator logic coupled to a first processor and a second processor;
• second comparator logic coupled to the first comparator logic, to the first processor, and to the second processor;
• and
• self-test logic circuitry coupled to the first comparator logic and the second comparator logic, the self-test logic circuitry configured to, in response to one or more first control signals:
• instruct the first comparator logic to compare an input from the first processor and a second input from the second processor;
• and
• instruct the second comparator logic to perform a self-test of the second comparator logic.

A system comprising:

• a first processor-;
• a second processor-;
• and
• lockstep control logic including:
• first comparator logic coupled to the first processor;
• second comparator logic coupled to the second processor;
• and
• self-test control logic coupled to an input of the first comparator logic, the self-test control logic having an output coupled to an input of the second comparator logic.