Flash memory structure with enhanced floating gate
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHung-Shu Huang, Ming Chyi Liu
Life of this patent
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Abstract
The present disclosure relates to a method of forming a flash memory structure. The method includes forming a sacrificial material over a substrate, and forming a plurality of trenches extending through the sacrificial material to within the substrate. A dielectric material is formed within the plurality of trenches. The dielectric material is selectively etched, according to a mask that is directly over the dielectric material, to form depressions along edges of the plurality of trenches. The sacrificial material between neighboring ones of the depressions is removed to form a floating gate recess. A floating gate material is formed within the floating gate recess and the neighboring ones of the depressions.
Claims20
A method of forming a flash memory structure, comprising:
- forming a sacrificial material over a substrate;
- removing a part of the sacrificial material to form a plurality of trenches extending through the sacrificial material to within the substrate;
- forming a dielectric material within the plurality of trenches;
- selectively etching the dielectric material, according to a mask that is directly over the dielectric material, to form depressions along edges of the plurality of trenches, wherein the mask has a width that increases as a distance from the substrate increases;
- removing the sacrificial material from between neighboring ones of the depressions to form a floating gate recess;
- and
- forming a floating gate material within the floating gate recess and the neighboring ones of the depressions.
A method of forming a flash memory structure, comprising:
- forming a sacrificial material over an upper surface of a substrate;
- forming trenches extending through the sacrificial material to within the substrate;
- forming a dielectric material within the trenches and over the sacrificial material, the dielectric material having a recess directly over the trenches;
- forming a masking layer over the dielectric material and within the recess;
- performing a first etching process to etch areas of the dielectric material that are outside of the masking layer, the first etching process exposing sidewalls of the sacrificial material and removing a part of the dielectric material from below the upper surface of the substrate;
- performing a second etching process on the sacrificial material to form a floating gate recess;
- and
- forming a floating gate material within the floating gate recess.
A method of forming a flash memory structure, comprising:
- forming a first trench and a second trench within a semiconductor substrate;
- forming a dielectric material within the first trench and the second trench;
- forming a mask over the dielectric material;
- performing a planarization process to remove a part of the mask and expose an upper surface of the dielectric material;
- and
- patterning the dielectric material so that the dielectric material within the first trench is at least partially separated from the semiconductor substrate by a first recess and so that the dielectric material within the second trench is at least partially separated from the semiconductor substrate by a second recess, wherein the dielectric material is patterned by etching the upper surface of the dielectric material that was exposed by the planarization process to define the first recess and the second recess;
- and
- forming a floating gate that continuously extends from within the first recess to within the second recess.
Dependencies are inferred from the claim text.